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TMS320DM6437 参数 Datasheet PDF下载

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型号: TMS320DM6437
PDF下载: 下载PDF文件 查看货源
内容描述: 数字媒体处理器 [Digital Media Processor]
分类和应用:
文件页数/大小: 309 页 / 2412 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320DM6437  
Digital Media Processor  
www.ti.com  
SPRS345BNOVEMBER 2006REVISED MARCH 2007  
Table 6-30. CCDC Register Descriptions (continued)  
HEX ADDRESS RANGE  
0x01C7 0438  
0x01C7 043C  
0x01C7 0440  
0x01C7 0444  
0x01C7 0448  
0x01C7 044C  
0x01C7 0450  
0x01C7 0454  
0x01C7 0458  
0x01C7 045C  
0x01C7 0460  
0x01C7 0464  
0x01C7 0468  
0x01C7 046C  
0x01C7 0470  
0x01C7 0474  
0x01C7 0478  
0x01C7 047C  
0x01C7 0480  
0x01C7 0484  
0x01C7 0488  
0x01C7 048C  
0x01C7 0490  
0x01C7 0494  
REGISTER ACRONYM  
COLPTN  
DESCRIPTION  
CCD Color Pattern  
Black Compensation  
Reserved  
BLKCMP  
-
-
Reserved  
VDINT  
VD Interrupt Timing  
A-Law Setting  
ALAW  
REC656IF  
CCDCFG  
REC656 Interface  
CCD Configuration  
FMTCFG  
Data Reformatter/Video Port Configuration  
Data Reformatter/Video Input Interface Horizontal Information  
Data Reformatter/Video Input Interface Vertical Information  
Address Pointer 0 Setup  
FMT_HORZ  
FMT_VERT  
FMT_ADDR0  
FMT_ADDR1  
FMT_ADDR2  
FMT_ADDR3  
FMT_ADDR4  
FMT_ADDR5  
FMT_ADDR6  
FMT_ADDR7  
PRGEVEN_0  
RRGEVEN_1  
PRGGODD_0  
PRGGODD_1  
VP_OUT  
Address Pointer 1 Setup  
Address Pointer 2 Setup  
Address Pointer 3 Setup  
Address Pointer 4 Setup  
Address Pointer 5 Setup  
Address Pointer 6 Setup  
Address Pointer 7 Setup  
Program Entries 0-7 for Even Line  
Program Entries 8-15 for Even Line  
Program Entries 0-7 for Odd Line  
Program Entries 8-15 for Odd Line  
Video Port Output Settings  
6.10.1.2 Preview Engine  
The preview engine transforms raw unprocessed image/video data from a sensor (CMOS or CCD) into  
YCbCr 4:2:2 data. The output of the preview engine is used for both video compression and external  
display devices such as a NTSC/PAL analog encoder or a digital LCD. The following features are  
supported by the preview engine.  
Accepts conventional Bayer pattern formats.  
Input image/video data from either the CCD/CMOS controller or the DDR2 memory.  
Output width up to 1280 pixels wide.  
Automatic/mandatory cropping of pixels/lines when edge processing is performed. If all the  
corresponding modules are enabled, a total of 14 pixels per line (7 left most and 7 right most) and 8  
lines (4 top most and 4 bottom most) will not be output.  
Simple horizontal averaging (by factors of 2, 4, or 8) to handle input widths that are greater than 1280  
(plus the cropped number) pixels wide.  
Dark frame capture to DDR2.  
Dark frame subtraction for every input raw data frame, fetched from DDR2, pixel-by-pixel to improve  
video quality.  
Lens shading compensation. Each input pixel is multiplied with a corresponding 8-bit gain value and  
the result is right shifted by a programmable parameter (0-7 bits).  
A-law decompression to transform non-linear 8-bit data to 10-bit linear data. This feature allows data in  
DDR2 to be 8-bits, which saves 50% of the area if the input to the preview engine is from the DDR2.  
Horizontal median filter for reducing temperature induced noise in pixels.  
Programmable noise filter that operates on a 3x3 grid of the same color (effectively, this is a five line  
216  
Peripheral Information and Electrical Specifications  
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