TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Power
Supplies
Ramping
Power Supplies Stable
Clock Source Stable
MXI(A)
CLKOUT0
POR
1
RESET
2
RESETOUT
3
SYSCLKREFCLK
(PLLC1)
SYSCLK1
SYSCLK2
SYSCLK3
5
4
8
Boot and
Configuration Pins
Config
Driven or Hi-Z
8
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Z+/Low Group
(Z longer-to-low)
8
9
Z+/High Group
(Z longer-to-low)
Z+/Invalid Group
(Z longer-to-Invalid)
Invalid
Z Group
7
7
Z/Low Group
(Z-to-low)
Z/High Group
(Z-to-high)
7
DDR2 Z Group
7
7
DDR2 Low Group
DDR2 High Group
A. Power supplies and MXI must be stable before the start of tW(RESET).
.
B. Pin reset behavior depends on which peripheral defaults to controlling the multiplexed pin. For more details on what
pin group (e.g., Z Group, Z/Low Group, Z/High Group, etc.) each pin belongs to, see Section 6.5.8, Pin Behaviors at
Reset.
Figure 6-7. Power-Up Timing(B)
194
Peripheral Information and Electrical Specifications
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