TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
3.3.16 Timer Input Selection Register (TINPSEL)
Timer input selection is handled within the control register TINPSEL. The Timer Input Selection Register is shown
in Figure 3-15 and described in Table 3-17.
Figure 3-15
Timer Input Selection Register (TINPSEL)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL
SEL9 SEL9 SEL8 SEL8 SEL7 SEL7 SEL6 SEL6 SEL5 SEL5 SEL4 SEL4 SEL3 SEL3 SEL2 SEL2
RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0
spacer
15
4
3
2
1
0
Reserved
R, +0
TINPH TINPL TINPH TINPL
SEL1 SEL1 SEL0 SEL0
RW, +1 RW, +0 RW, +1 RW, +0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 3-17
Timer Input Selection Field Description (TINPSEL) (Part 1 of 2)
Bit
Field
Description
31
TINPHSEL9
TINPLSEL9
TINPHSEL8
TINPLSEL8
TINPHSEL7
TINPLSEL7
TINPHSEL6
TINPLSEL6
TINPHSEL5
TINPLSEL5
TINPHSEL4
Input select for TIMER9 high.
0 = TIMI0
1 = TIMI1
30
29
28
27
26
25
24
23
22
21
Input select for TIMER9 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER8 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER8 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER7 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER7 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER6 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER6 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER5 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER5 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER4 high.
0 = TIMI0
1 = TIMI1
Copyright 2012 Texas Instruments Incorporated
Device Configuration 85
TI [ TEXAS INSTRUMENTS ]
