PGA400-Q1
SLDS186 –MARCH 2012
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5.8 Offset and Offset TC Compensation
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Offset Setting = 0x000, Stage 1
Gain Setting = 0b000
Offset Compensation Low
-385
-324
-279
mV
Offset Setting = 0x3FF, Stage 1
Gain Setting = 0b000
Offset Compensation High
279
324
385
mV
Offset Compensation Resolution
Offset TC Compensation Low
Stage 1 Gain Setting = 0b000
0.59
0.72
mV/step
µV/°C
Offset TC Setting = 0x00, Stage 1
Gain Value = 0b000
-371
361
Offset TC Settin g= 0x3F, Stage 1
Gain Value = 0b000
Offset TC Compensation H igh
µV/°C
Offset TC Compensation Resolution Stage 1 Gain Value = 0b000
Reference Temperature
11.6
22
µV/V/°C/step
°C
5.9 Analog to Digital Converter
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC BUFFER FOR 16-BIT AD CONVERTER 1
Gain
1.9
-1.74
-15
2
2.1
-1.55
15
V/V
V
DC Level Shift
DC Offset
ADC_BUF bit = 1
–1.65
mV
ADC BUFFER FOR 10-BIT AD CONVERTER 2
VIN3 Input Voltage Range
Gain
0.425
1.09
-15
1.7
1.21
15
V
1.15
V/V
mV
DC Offset
VIN3 VOLTAGE VERSUS ADC CODE
(1)
Gain
740
760
-820
0.02
-0.02
780
LSB/V
LSB
Offset(1)
-850
-790
Gain Temperature Coefficient
Offset Temperature Coefficient
Integral Nonlinearity
Tamb = 25 °C
Tamb = 25 °C
LSB/V/°C
LSB/°C
LSB
-1
1
(1) ADC Code = Gain*VIN3+Offset
5.10 One Wire Interface
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Bits Per
Second
Communication Baud Rate
2400
6.5
115000
7.0
OWI_EN
OWI Enable
V
OWI_ENhy
s
OWI Enable Hysteresis
50
10
mV
Internal Pullup
KΩ
ms
ms
V
Activation Signal Pulse Low time
Activation Signal Pulse High time
OWI Transceiver Rx Threshold
OWI Transceiver Rx Threshold
12
12
OWI_VIH
OWI_VIL
0.7 × VDD
–0.3
VDD + 0.3
0.3 × VDD
V
OWI_VOH OWI Transceiver Tx Threshold
OWI_VOL OWI Transceiver Tx Threshold
VDD = 5 V
VDD = 5 V
4.0
0.8
V
8
ELECTRICAL CHARACTERISTICS
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