PCM9211
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SBAS495 –JUNE 2010
Register 75h, MPIO_B3, MPIO_B2 Output Flag Select
(Address: 75h, Write and Read)
DATA
Reg Name
Default Value
Memo
B7
MPB3FLG3
0
B6
MPB3FLG2
0
B5
MPB3FLG1
0
B4
MPB3FLG0
0
B3
MPB2FLG3
0
B2
MPB2FLG2
0
B1
B0
MPB2FLG1
0
MPB2FLG0
0
MPB3FLG[3:0]: MPIO_B3 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
MPB2FLG[3:0]: MPIO_B2 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
These register settings are effective only at MPBSEL[2:0] = '011', MPB3SEL = '0', and MPB2SEL = '0'.
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