PCM9211
SBAS495 –JUNE 2010
www.ti.com
Register 72h, MPIO_A1, MPIO_A0 Output Flag Select
(Address: 72h, Write and Read)
DATA
B7
B6
MPA1FLG2
0
B5
MPA1FLG1
0
B4
MPA1FLG0
0
B3
MPA0FLG3
0
B2
MPA0FLG2
0
B1
MPA0FLG1
0
B0
MPA0FLG0
0
Reg Name
Default Value
Memo
MPA1FLG3
0
MPA1FLG[3:0]: MPIO_A1 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
MPA0FLG[3:0]: MPIO_A0 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
These register settings are effective only at MPASEL[1:0] = '11', MPA3SEL = '0', and MPA2SEL = '0'.
104
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): PCM9211
TI [ TEXAS INSTRUMENTS ]
