PCM9211
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SBAS495 –JUNE 2010
Register 73h, MPIO_A3, MPIO_A0 Output Flag Select
(Address: 73h, Write and Read)
DATA
Reg Name
Default Value
Memo
B7
MPA3FLG3
0
B6
MPA3FLG2
0
B5
MPA3FLG1
0
B4
MPA3FLG0
0
B3
MPA2FLG3
0
B2
MPA2FLG2
0
B1
B0
MPA2FLG1
0
MPA2FLG0
0
MPA3FLG[3:0]: MPIO_A3 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
MPA2FLG[3:0]: MPIO_A2 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
These register settings are effective only at MPASEL[1:0] = '11', MPA3SEL = '0', and MPA2SEL = '0'.
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