PCM9211
www.ti.com
SBAS495 –JUNE 2010
Register 71h, MPIO_B, MPIO_C Flags or GPIO Assign Setting
(Address: 71h, Write and Read)
DATA
Reg Name
Default Value
Memo
B7
MPB3SEL
0
B6
MPB2SEL
0
B5
MPB1SEL
0
B4
MPB0SEL
0
B3
MPC3SEL
0
B2
MPC2SEL
0
B1
B0
MPC1SEL
0
MPC0SEL
0
MPB3SEL: MPIO_B3 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPB3FLG[3:0] (default)
1: GPIO, set by GIOB3DIR/GPOB3/GPIB3
MPB2SEL: MPIO_B2 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPB2FLG[3:0] (default)
1: GPIO, set by GIOB2DIR/GPOB2/GPIB2
MPB1SEL: MPIO_B1 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPB1FLG[3:0] (default)
1: GPIO, set by GIOB1DIR/GPOB1/GPIB1
MPB0SEL: MPIO_B0 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPB0FLG[3:0] (default)
1: GPIO, set by GIOB0DIR/GPOB0/GPIB0
MPC3SEL: MPIO_C3 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPC3FLG[3:0] (default)
1: GPIO, set by GIOC3DIR/GPOC3/GPIC3
MPC2SEL: MPIO_C2 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPC2FLG[3:0] (default)
1: GPIO, set by GIOC2DIR/GPOC2/GPIC2
MPC1SEL: MPIO_C1 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPC1FLG[3:0] (default)
1: GPIO, set by GIOC1DIR/GPOC1/GPIC1
MPC0SEL: MPIO_C0 Pin Function, DIR Flags or GPIO Select
0: DIR Flags, set by MPC0FLG[3:0] (default)
1: GPIO, set by GIOC0DIR/GPOC0/GPIC0
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
103
Product Folder Link(s): PCM9211
TI [ TEXAS INSTRUMENTS ]
