5.10 Port Decode Enable Register
The port decode enable register is used to select which serial and parallel port addresses are positively decoded from
the bridge primary bus to the secondary bus. See Table 5–8 for a complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Port decode enable
R
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Register:
Type:
Port decode enable
Read-only, Read/Write
Offset:
Default:
58h
00h
Table 5–8. Port Decode Enable Register
BIT
TYPE
FUNCTION
7
R
Reserved. Bit 7 returns 0 when read.
LPT3 enable. When bit 6 is set, the address ranges 278h–27Fh and 678h–67Bh are positively decoded and the cycles
passed to the secondary bus based on the setting of bit 6 of the port decode map register (offset 5Ah, see Section 5.12).
6
5
4
3
2
1
R/W
LPT2 enable. When bit 5 is set, the address ranges 378h–37Fh and 778h–77Bh are positively decoded and the cycles
passed to the secondary bus based on the setting of bit 5 of the port decode map register (offset 5Ah, see Section 5.12).
R/W
R/W
R/W
R/W
R/W
LPT1 enable. When bit 4 is set, the address ranges 3BCh–3BFh and 7BCh–7BFh are positively decoded and the cycles
passed to the secondary bus based on the setting of bit 4 of the port decode map register (offset 5Ah, see Section 5.12).
COM4 enable. When bit 3 is set, the address range 2E8h–2EFh is positively decoded and the cycles passed to the
secondary bus based on the setting of bit 3 of the port decode map register (offset 5Ah, see Section 5.12).
COM3 enable. When bit 2 is set, the address range 3E8h–3EFh is positively decoded and the cycles passed to the
secondary bus based on the setting of bit 2 of the port decode map register (offset 5Ah, see Section 5.12).
COM2 enable. When bit 1 is set, the address range 2F8h–2FFh is positively decoded and the cycles passed to the
secondary bus based on the setting of bit 1 of the port decode map register (offset 5Ah, see Section 5.12).
COM1 enable. When bit 0 is set, the address range 3F8h–3FFh is positively decoded and the cycles passed to the
secondary bus based on the setting of bit 0 of the port decode map register (offset 5Ah, see Section 5.12).
0
R/W
5–8
TI [ TEXAS INSTRUMENTS ]
