destination bus. If it is a write transaction, then the bridge writes the data and obtains the completion status, thus
completing the transaction on the destination bus. The bridge stores the completion status until the master on the
initiating bus retries the initial request.
During the third phase, the initiator rearbitrates for the bus. When the bridge sees the initiator retry the transaction,
it compares the second request to the first request. If the address, command, and byte enables match the values
latched in the first request, then the completion status (and data if the request was a read) is transferred to the initiator.
At this point, the delayed transaction is complete. If the second request from the initiator does not match the first
request exactly, then the bridge issues another retry to the initiator.
When bit 2 of the diagnostic control register (offset 5Ch, see Section 5.14) is 0, the PCI2250 is configured for
immediate retry mode. In immediate retry mode, the bridge issues a retry immediately, instead of after 16 clocks, on
delayed transactions.
The PCI2250 supports one delayed transaction in each direction at any given time.
3.14 Multifunction Pins
The PCI2250 has two multifunction pins that can be configured as LOCK, CLKRUN or compact-PCI hot-swap ENUM
and SWITCH. The configuration of P_MFUNC and S_MFUNC is controlled by MS0 and MS1 and is shown in
Table 3–3. The PCI2250 has two modes of operation: Intel-compatible mode and TI mode. In the Intel mode, the
PCI2250 is pin compatible with the Intel 21152 bridge.
Table 3–3. Multifunction Pin Definitions Based on Mode Select Pins
MS1
P_MFUNC
HS_ENUM
P_CLKRUN
P_LOCK
S_MFUNC
HS_SWITCH
S_CLKRUN
S_LOCK
MODE
TI hot-swap
TI clock run
Intel
MS0
0
0
1
0
1
BPCC
3.14.1 Compact-PCI Hot-Swap Support
The PCI2250 is hot-swap friendly silicon that supports all the CPCI hot-swap capable features, contains support for
software control, and integrates circuitry required by the CPCI Hot-Swap Specification. To be hot-swap capable, the
PCI2250 supports the following:
•
•
•
•
•
•
•
•
Compliance with PCI Local Bus Specification
Tolerance of V from early power
CC
Asynchronous reset
Tolerance of precharge voltage
I/O buffers must meet modified V/I requirements
Limited I/O pin voltage at precharge voltage
Hot-swap control and status programming via extended PCI capabilities linked list
Hot-swap terminals: HS_ENUM, HS_SWITCH, and HS_LED.
CPCI hot-swap defines a process for installing and removing PCI boards without adversely affecting a running
system. The PCI2250 provides this functionality such that it can be implemented on a board that can be removed
and inserted in a hot-swap system.
The PCI2250 provides three terminals to support hot-swap when configured to be in hot-swap mode: HS_ENUM
(output), HS_SWITCH (input), and HS_LED (output). The HS_ENUM output indicates to the system that an insertion
event occurred or that a removal event is about to occur. The HS_SWITCH input indicates the state of a board ejector
handle, and the HS_LED output lights a blue LED to signal insertion and removal ready status.
3–9
TI [ TEXAS INSTRUMENTS ]
