OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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Table 6-4. AINTC System Interrupt Assignments (continued)
System Interrupt
Interrupt Name
GPIO_B5INT
GPIO_B6INT
GPIO_B7INT
-
Source
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
GPIO Bank 5 Interrupt
GPIO Bank 6 Interrupt
GPIO Bank 7 Interrupt
Reserved
IIC1_INT
I2C1
LCDC_INT
LCD Controller
UART_INT1
MCASP_INT
PSC1_ALLINT
SPI1_INT
UART1
McASP0, 1, 2 Combined RX / TX Interrupts
PSC1
SPI1
UHPI_ARMINT
USB0_INT
HPI Arm Interrupt
USB0 Interrupt
USB1_HCINT
USB1_RWAKEUP
UART2_INT
-
USB1 OHCI Host Controller Interrupt
USB1 Remote Wakeup Interrupt
UART2
Reserved
EHRPWM0
HiResTimer / PWM0 Interrupt
HiResTimer / PWM0 Trip Zone Interrupt
HiResTimer / PWM1 Interrupt
HiResTimer / PWM1 Trip Zone Interrupt
HiResTimer / PWM2 Interrupt
HiResTimer / PWM2 Trip Zone Interrupt
ECAP0
EHRPWM0TZ
EHRPWM1
EHRPWM1TZ
EHRPWM2
EHRPWM2TZ
ECAP0
ECAP1
ECAP1
ECAP2
ECAP2
EQEP0
EQEP0
EQEP1
EQEP1
T64P0_CMPINT0
T64P0_CMPINT1
T64P0_CMPINT2
T64P0_CMPINT3
T64P0_CMPINT4
T64P0_CMPINT5
T64P0_CMPINT6
T64P0_CMPINT7
T64P1_CMPINT0
T64P1_CMPINT1
T64P1_CMPINT2
T64P1_CMPINT3
T64P1_CMPINT4
T64P1_CMPINT5
T64P1_CMPINT6
T64P1_CMPINT7
ARMCLKSTOPREQ
-
Timer64P0 - Compare 0
Timer64P0 - Compare 1
Timer64P0 - Compare 2
Timer64P0 - Compare 3
Timer64P0 - Compare 4
Timer64P0 - Compare 5
Timer64P0 - Compare 6
Timer64P0 - Compare 7
Timer64P1 - Compare 0
Timer64P1 - Compare 1
Timer64P1 - Compare 2
Timer64P1 - Compare 3
Timer64P1 - Compare 4
Timer64P1 - Compare 5
Timer64P1 - Compare 6
Timer64P1 - Compare 7
PSC0
Reserved
-
Reserved
-
Reserved
88
Peripheral Information and Electrical Specifications
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