OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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Table 6-39. McASP Registers Accessed Through Peripheral Configuration Port (continued)
Offset
McASP0
BYTE
McASP1
BYTE
McASP2
BYTE
Acronym
Register Description
ADDRESS
ADDRESS
ADDRESS
238h
23Ch
280h
284h
288h
28Ch
290h
294h
298h
29Ch
2A0h
2A4h
2A8h
2ACh
2B0h
2B4h
2B8h
2BCh
0x01D0 0238
0x01D0 023C
0x01D0 0280
0x01D0 0284
0x01D0 0288
0x01D0 028C
0x01D0 0290
0x01D0 0294
0x01D0 0298
0x01D0 029C
0x01D0 02A0
0x01D0 02A4
0x01D0 02A8
0x01D0 4238
0x01D0 423C
0x01D0 4280
0x01D0 4284
0x01D0 4288
0x01D0 428C
0x01D0 4290
0x01D0 4294
0x01D0 4298
0x01D0 429C
0x01D0 42A0
0x01D0 42A4
0x01D0 42A8
0x01D0 8238 XBUF14(1)
0x01D0 823C XBUF15(1)
0x01D0 8280 RBUF0(2)
0x01D0 8284 RBUF1(2)
0x01D0 8288 RBUF2(2)
0x01D0 828C RBUF3(2)
0x01D0 8290 RBUF4(2)
0x01D0 8294 RBUF5(2)
0x01D0 8298 RBUF6(2)
0x01D0 829C RBUF7(2)
0x01D0 82A0 RBUF8(2)
0x01D0 82A4 RBUF9(2)
0x01D0 82A8 RBUF10(2)
Transmit buffer register for serializer 14
Transmit buffer register for serializer 15
Receive buffer register for serializer 0
Receive buffer register for serializer 1
Receive buffer register for serializer 2
Receive buffer register for serializer 3
Receive buffer register for serializer 4
Receive buffer register for serializer 5
Receive buffer register for serializer 6
Receive buffer register for serializer 7
Receive buffer register for serializer 8
Receive buffer register for serializer 9
Receive buffer register for serializer 10
Receive buffer register for serializer 11
Receive buffer register for serializer 12
Receive buffer register for serializer 13
Receive buffer register for serializer 14
Receive buffer register for serializer 15
0x01D0 02AC 0x01D0 42AC 0x01D0 82AC RBUF11(2)
0x01D0 02B0
0x01D0 02B4
0x01D0 02B8
0x01D0 42B0
0x01D0 42B4
0x01D0 42B8 0x01D0 82BB RBUF14(2)
0x01D0 82B0 RBUF12(2)
0x01D0 82B4 RBUF13(2)
0x01D0 02BC 0x01D0 42BC 0x01D0 82BC RBUF15(2)
(2) Reads from XRBUF originate on peripheral configuration port only when RBUSEL = 1 in RFMT.
Table 6-40. McASP Registers Accessed Through DMA Port
Hex Address
Register Name
Register Description
Read Accesses
RBUF
Receive buffer DMA port address. Cycles through receive serializers, skipping over transmit
serializers and inactive serializers. Starts at the lowest serializer at the beginning of each time slot.
Reads from DMA port only if XBUSEL = 0 in XFMT.
Write Accesses
XBUF
Transmit buffer DMA port address. Cycles through transmit serializers, skipping over receive and
inactive serializers. Starts at the lowest serializer at the beginning of each time slot. Writes to DMA
port only if RBUSEL = 0 in RFMT.
Table 6-41. McASP AFIFO Registers Accessed Through Peripheral Configuration Port
McASP0
McASP0
McASP0
Acronym
Register Description
BYTE ADDRESS
BYTE ADDRESS
BYTE ADDRESS
0x01D0 1000
0x01D0 1010
0x01D0 1014
0x01D0 1018
0x01D0 101C
0x01D0 5000
0x01D0 5010
0x01D0 5014
0x01D0 5018
0x01D0 501C
0x01D0 9000
0x01D0 9010
0x01D0 9014
0x01D0 9018
0x01D0 901C
AFIFOREV
WFIFOCTL
WFIFOSTS
RFIFOCTL
RFIFOSTS
AFIFO revision identification register
Write FIFO control register
Write FIFO status register
Read FIFO control register
Read FIFO status register
134
Peripheral Information and Electrical Specifications
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