OMAP-L137 Low-Power Applications Processor
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SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
1
3
3
MDCLK
4
5
MDIO
(input)
Figure 6-30. MDIO Input Timing
Table 6-37. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
(see Figure 6-31)
NO.
UNIT
MIN
MAX
7
td(MDCLKL-MDIO)
Delay time, MDCLK low to MDIO data output valid
0
100
ns
1
MDCLK
7
MDIO
(output)
Figure 6-31. MDIO Output Timing
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Peripheral Information and Electrical Specifications
129