OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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6.14 Management Data Input/Output (MDIO)
The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to
enumerate all PHY devices in the system.
The Management Data Input/Output (MDIO) module implements the 802.3 serial management interface to
interrogate and control Ethernet PHY(s) using a shared two-wire bus. Host software uses the MDIO
module to configure the auto-negotiation parameters of each PHY attached to the EMAC, retrieve the
negotiation results, and configure required parameters in the EMAC module for correct operation. The
module is designed to allow almost transparent operation of the MDIO interface, with very little
maintenance from the core processor. Only one PHY may be connected at any given time.
For more detailed information on the MDIO peripheral, see the OMAP-L137 Applications Processor DSP
Peripherals Overview Reference Guide. – Literature Number SPRUGA6 .
6.14.1 MDIO Registers
For a list of supported MDIO registers see Table 6-35 [MDIO Registers].
Table 6-35. MDIO Register Memory Map
HEX ADDRESS RANGE
0x01E2 4000
ACRONYM
REV
REGISTER NAME
Revision Identification Register
0x01E2 4004
CONTROL
ALIVE
MDIO Control Register
0x01E2 4008
MDIO PHY Alive Status Register
0x01E2 400C
LINK
MDIO PHY Link Status Register
0x01E2 4010
LINKINTRAW
LINKINTMASKED
–
MDIO Link Status Change Interrupt (Unmasked) Register
MDIO Link Status Change Interrupt (Masked) Register
Reserved
0x01E2 4014
0x01E2 4018
0x01E2 4020
USERINTRAW
USERINTMASKED
USERINTMASKSET
MDIO User Command Complete Interrupt (Unmasked) Register
MDIO User Command Complete Interrupt (Masked) Register
MDIO User Command Complete Interrupt Mask Set Register
0x01E2 4024
0x01E2 4028
0x01E2 402C
USERINTMASKCLEAR MDIO User Command Complete Interrupt Mask Clear Register
0x01E2 4030 - 0x01E2 407C
0x01E2 4080
–
Reserved
USERACCESS0
USERPHYSEL0
USERACCESS1
USERPHYSEL1
–
MDIO User Access Register 0
MDIO User PHY Select Register 0
MDIO User Access Register 1
MDIO User PHY Select Register 1
Reserved
0x01E2 4084
0x01E2 4088
0x01E2 408C
0x01E2 4090 - 0x01E2 47FF
6.14.2 Management Data Input/Output (MDIO) Electrical Data/Timing
Table 6-36. Timing Requirements for MDIO Input (see Figure 6-30 and Figure 6-31)
NO.
UNIT
MIN
400
180
MAX
1
2
3
4
5
tc(MDCLK)
Cycle time, MDCLK
ns
ns
ns
ns
ns
tw(MDCLK)
Pulse duration, MDCLK high/low
tt(MDCLK)
Transition time, MDCLK
5
tsu(MDIO-MDCLKH)
th(MDCLKH-MDIO)
Setup time, MDIO data input valid before MDCLK high
Hold time, MDIO data input valid after MDCLK high
10
10
128
Peripheral Information and Electrical Specifications
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