MSP430F663x
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SLAS566C –JUNE 2010–REVISED AUGUST 2012
DMA Controller
The DMA controller allows movement of data from one memory address to another without CPU intervention. For
example, the DMA controller can be used to move data from the ADC12_A conversion memory to RAM. Using
the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system
power consumption by allowing the CPU to remain in sleep mode, without having to awaken to move data to or
from a peripheral.
The USB timestamp generator also uses the channel 0, 1, and 2 DMA trigger assignments described in
Table 15.
Table 15. DMA Trigger Assignments(1)
Channel
Trigger
0
1
2
3
4
5
0
DMAREQ
1
TA0CCR0 CCIFG
TA0CCR2 CCIFG
TA1CCR0 CCIFG
TA1CCR2 CCIFG
TA2CCR0 CCIFG
TA2CCR2 CCIFG
TBCCR0 CCIFG
TBCCR2 CCIFG
Reserved
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
UCA0RXIFG
UCA0TXIFG
UCB0RXIFG
UCB0TXIFG
UCA1RXIFG
UCA1TXIFG
UCB1RXIFG
UCB1TXIFG
ADC12IFGx(2)
DAC12_0IFG(3)
DAC12_1IFG(3)
USB FNRXD
USB ready
MPY ready
DMA5IFG
DMA0IFG
DMA1IFG
DMA2IFG
DMAE0
DMA3IFG
DMA4IFG
(1) Reserved DMA triggers may be used by other devices in the family. Reserved DMA triggers will not
cause any DMA trigger event when selected.
(2) Only on devices with peripheral module ADC12_A. Reserved on devices without ADC.
(3) Only on devices with peripheral module DAC12_A. Reserved on devices without DAC.
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