MSP430F663x
SLAS566C –JUNE 2010–REVISED AUGUST 2012
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Timer TA2
Timer TA2 is a 16-bit timer/counter (Timer_A type) with three capture/compare registers. It supports multiple
capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities. Interrupts may
be generated from the counter on overflow conditions and from each of the capture/compare registers.
Table 18. Timer TA2 Signal Connections
INPUT PIN NUMBER
DEVICE
INPUT
SIGNAL
MODULE
INPUT
SIGNAL
MODULE
OUTPUT
SIGNAL
DEVICE
OUTPUT
SIGNAL
OUTPUT PIN NUMBER
MODULE
BLOCK
PZ
ZQW
PZ
ZQW
46-P3.4
J8-P3.4
TA2CLK
ACLK
TACLK
ACLK
SMCLK
TACLK
CCI0A
CCI0B
GND
Timer
CCR0
NA
NA
SMCLK
TA2CLK
TA2.0
DVSS
46-P3.4
47-P3.5
J8-P3.4
M9-P3.5
47-P3.5
48-P3.6
M9-P3.5
L9-P3.6
TA0
TA2.0
DVSS
DVCC
VCC
48-P3.6
49-P3.7
L9-P3.6
TA2.1
CCI1A
CBOUT
(internal)
CCI1B
CCR1
CCR2
TA1
TA2
TA2.1
TA2.2
DVSS
DVCC
TA2.2
GND
VCC
M10-P3.7
CCI2A
49-P3.7
M10-P3.7
ACLK
(internal)
CCI2B
DVSS
DVCC
GND
VCC
30
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