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MSP430F6630IPZR 参数 Datasheet PDF下载

MSP430F6630IPZR图片预览
型号: MSP430F6630IPZR
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 116 页 / 1284 K
品牌: TI [ TEXAS INSTRUMENTS ]
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MSP430F663x  
www.ti.com  
SLAS566C JUNE 2010REVISED AUGUST 2012  
Hardware Multiplier  
The multiplication operation is supported by a dedicated peripheral module. The module performs operations with  
32-bit, 24-bit, 16-bit, and 8-bit operands. The module is capable of supporting signed and unsigned multiplication  
as well as signed and unsigned multiply and accumulate operations.  
Real-Time Clock (RTC_B)  
The RTC_B module can be configured for real-time clock (RTC) or calendar mode providing seconds, minutes,  
hours, day of week, day of month, month, and year. Calendar mode integrates an internal calendar which  
compensates for months with less than 31 days and includes leap year correction. The RTC_B also supports  
flexible alarm functions and offset-calibration hardware. The implementation on this device supports operation in  
LPM3.5 mode and operation from a backup supply.  
Watchdog Timer (WDT_A)  
The primary function of the watchdog timer (WDT_A) module is to perform a controlled system restart after a  
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog  
function is not needed in an application, the module can be configured as an interval timer and can generate  
interrupts at selected time intervals.  
System Module (SYS)  
The SYS module handles many of the system functions within the device. These include power-on reset and  
power-up clear handling, NMI source selection and management, reset interrupt vector generators, bootstrap  
loader entry mechanisms, and configuration management (device descriptors). SYS also includes a data  
exchange mechanism via JTAG called a JTAG mailbox that can be used in the application.  
Table 14. System Module Interrupt Vector Registers  
INTERRUPT VECTOR  
INTERRUPT EVENT  
WORD ADDRESS  
OFFSET  
PRIORITY  
REGISTER  
No interrupt pending  
Brownout (BOR)  
00h  
02h  
Highest  
RST/NMI (BOR)  
04h  
DoBOR (BOR)  
06h  
LPM3.5 or LPM4.5 wakeup (BOR)  
Security violation (BOR)  
SVSL (POR)  
08h  
0Ah  
0Ch  
0Eh  
SVSH (POR)  
SVML_OVP (POR)  
SVMH_OVP (POR)  
DoPOR (POR)  
10h  
SYSRSTIV, System Reset  
019Eh  
12h  
14h  
WDT timeout (PUC)  
WDT key violation (PUC)  
KEYV flash key violation (PUC)  
Reserved  
16h  
18h  
1Ah  
1Ch  
1Eh  
Peripheral area fetch (PUC)  
PMM key violation (PUC)  
Reserved  
20h  
22h to 3Eh  
Lowest  
Copyright © 2010–2012, Texas Instruments Incorporated  
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