LM5116
SNVS499G –FEBRUARY 2007–REVISED MARCH 2013
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Proper selection of the RAMP capacitor (CRAMP) depends upon the value of the output inductor (L) and the
current sense resistor (RS). For proper current emulation, the DC sample and hold value and the ramp amplitude
must have the same dependence on the load current. That is:
gm x L
, so
RS x A =
CRAMP
gm x L
A x RS
CRAMP
=
where
•
•
gm is the ramp generator transconductance (5 µA/V)
A is the current sense amplifier gain (10 V/V)
(3)
The ramp capacitor should be located very close to the device and connected directly to the pins of the IC
(RAMP and AGND).
The difference between the average inductor current and the DC value of the sampled inductor current can
cause instability for certain operating conditions. This instability is known as sub-harmonic oscillation, which
occurs when the inductor ripple current does not return to its initial value by the start of next switching cycle.
Sub-harmonic oscillation is normally characterized by observing alternating wide and narrow pulses at the switch
node. Adding a fixed slope voltage ramp (slope compensation) to the current sense signal prevents this
oscillation. The 25 µA of offset current provided from the emulated current source adds the optimal slope
compensation to the ramp signal for a 5V output. For higher output voltages, additional slope compensation may
be required. In these applications, a resistor is added between RAMP and VCC to increase the ramp slope
compensation.
SW
LO
R
R
G
G
CS
CSG
DEMB
R
DEMB
Figure 32. RDS(ON) Current Sensing without Diode Emulation
The DC current sample is obtained using the CS and CSG pins connected to either a source sense resistor (RS)
or the RDS(ON) of the low-side MOSFET. For RDS(ON) sensing, RS = RDS(ON) of the low-side MOSFET. In this case
it is sometimes helpful to adjust the current sense amplifier gain (A) to a lower value in order to obtain the
desired current limit. Adding external resistors RG in series with CS and CSG, the current sense amplifier gain A
becomes:
10k
A ,
1k + RG
(4)
Current Limit
The LM5116 contains a current limit monitoring scheme to protect the circuit from possible over-current
conditions. When set correctly, the emulated current sense signal is proportional to the buck switch current with a
scale factor determined by the current limit sense resistor. The emulated ramp signal is applied to the current
limit comparator. If the emulated ramp signal exceeds 1.6V, the current cycle is terminated (cycle-by-cycle
current limiting). Since the ramp amplitude is proportional to VIN - VOUT, if VOUT is shorted, there is an immediate
reduction in duty cycle. To further protect the external switches during prolonged current limit conditions, an
internal counter counts clock pulses when in current limit. When the counter detects 256 consecutive clock
cycles, the regulator enters a low power dissipation hiccup mode of current limit. The regulator is shut down by
momentarily pulling UVLO low, and the soft-start capacitor discharged. The regulator is restarted with a full soft-
start cycle once UVLO charges back to 1.215V. This process is repeated until the fault is removed. The hiccup
off-time can be controlled by a capacitor to ground on the UVLO pin. In applications with low output inductance
and high input voltage, the switch current may overshoot due to the propagation delay of the current limit
16
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