LM5116
SNVS499G –FEBRUARY 2007–REVISED MARCH 2013
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Enable
The LM5116 contains an enable function allowing a very low input current shutdown. If the enable pin is pulled
below 0.5V, the regulator enters shutdown, drawing less than 10 µA from the VIN pin. Raising the EN input
above 3.3V returns the regulator to normal operation. The maximum EN transition time for proper operation is
one switching period. For example, the enable rise time must be less than 4 μs for 250 kHz operation.
A 1 MΩ pull-up resistor to VIN can be used to interface with an open collector control signal. At low input voltage
the pull-up resistor may be reduced to 100 kΩ to speed up the EN transition time. The EN pin can be tied directly
to VIN if this function is not needed. It must not be left floating. If low-power shutdown is not needed, the UVLO
pin should be used as an on/off control.
Internal 5V rail
3 mA
EN
6V
Figure 29. Enable Circuit
Figure 30. EN Bias Current vs Voltage
UVLO
An under-voltage lockout pin is provided to disable the regulator without entering shutdown. If the UVLO pin is
pulled below 1.215V, the regulator enters a standby mode of operation with the soft-start capacitor discharged
and outputs disabled, but with the VCC regulator running. If the UVLO input is pulled above 1.215V, the
controller will resume normal operation. A voltage divider from input to ground can be used to set a VIN threshold
to disable the supply in brown-out conditions or for low input faults. The UVLO pin has a 5 µA internal pull up
current that allows this pin to left open if the input under-voltage lockout function is not needed. For applications
which require fast on/off cycling, the UVLO pin with an open collector control signal may be used to ensure
proper start-up sequencing.
The UVLO pin is also used to implement a “hiccup” current limit. If a current limit fault exists for more than 256
consecutive clock cycles, the UVLO pin will be internally pulled down to 200 mV and then released, and a new
SS cycle initiated. A capacitor to ground connected to the UVLO pin will set the timing for hiccup mode current
limit. When this feature is used in conjunction with the voltage divider, a diode across the top resistor may be
used to discharge the capacitor in the event of an input under-voltage condition. There is a 5 µs filter at the input
to the fault comparator. At higher switching frequency (greater than approximately 250 kHz) the hiccup timer may
be disabled if the fault capacitor is not used.
Oscillator and Sync Capability
The LM5116 oscillator frequency is set by a single external resistor connected between the RT/SYNC pin and
the AGND pin. The resistor should be located very close to the device and connected directly to the pins of the
IC (RT/SYNC and AGND). To set a desired oscillator frequency (fSW), the necessary value for the resistor can be
calculated from the following equation:
T - 450 ns
RT =
284 pF
where
•
T = 1 / fSW and RT is in ohms
(1)
450 ns represents the fixed minimum off time.
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