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DP83840AVCE 参数 Datasheet PDF下载

DP83840AVCE图片预览
型号: DP83840AVCE
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100 Mb / s的以太网物理层 [10/100 Mb/s Ethernet Physical Layer]
分类和应用: 电信集成电路电信电路信息通信管理以太网局域网(LAN)标准
文件页数/大小: 91 页 / 682 K
品牌: TI [ TEXAS INSTRUMENTS ]
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March 1997  
DP83840A  
10/100 Mb/s Ethernet Physical Layer  
Features  
General Description  
The DP83840A is a Physical Layer device for Ethernet  
10BASE-T and 100BASE-X using category 5 Unshielded,  
Type 1 Shielded and Fiber Optic cables.  
IEEE 802.3 10BASE-T compatible--ENDEC and UTP/  
STP transceivers and filters built-in  
IEEE 802.3u 100BASE-X compatible--support for 2 pair  
Category 5 UTP (100m), Type 1 STP and Fiber Optic  
Transceivers--Connects directly to the DP83223 Twisted  
Pair Transceiver  
This VLSI device is designed for easy implementation of  
10/100 Mb/s Ethernet LANs. It interfaces to the PMD sub-  
layer through National Semiconductor's DP83223 Twisted  
Pair Transceiver, and to the MAC layer through a Media  
Independent Interface (MII), ensuring interoperability  
between products from different vendors.  
ANSI X3T12 TP-PMD c
IEEE 802.3u Auto-Negfor aomatic speed  
selection  
IEEE 802.3u catible Ma Inependent Interface  
(MII) with Serial Magement Interface  
The DP83840A is designed with National Semiconductor's  
BiCMOS process. Its system architecture is based on the  
integration of several of National Semiconductor's industry  
proven core technologies:  
Integrateperformnc100 Mb/s clock recovery  
circuitno external filters  
Full Dupporor 10 and 100 Mb/s  
10BASE-T ENDEC/Transceiver module to provide the 10  
Mb/s IEEE 802.3 functions  
MII S10 Mb/s utput mode  
Clock Recovery/Generator Modules from National  
Semiconductor's leading FDDI product  
Fly confranode and repeater modes--allows  
opetion in either application  
FDDI Stream Cipher (Cyclone)  
rogramable loopback modes for easy system  
gnostics  
100BASE-X physical coding sub-layer (PCS) and
logic that integrate the core modules into a dual sp
Ethernet physical layer controller  
ible LED support  
EE 1149.1 Standard Test Access Port and Boundary-  
Scan compatible  
Small footprint 100-pin PQFP package  
Individualized scrambler seed for multi-PHY applications  
System Diagram  
10BASE-T  
10 AND/OR 100 Mb/
DP83840A  
ETHERNET MAC OR  
10/100 Mb/s  
REPEATER/SWITCH  
DP83223  
RJ-45  
ETHERNET PHYSICAL LAYER  
PORT  
100BASE-TX  
TRANSCEIVER  
10BASE-T  
OR  
100BASE-TX  
STATUS  
100BASE-FX  
TRANSCEIVER  
CLOCKS  
LEDS  
Version A  
National Semiconductor  
1
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