DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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A8(A)
CACLMY
CACLMX
A8(A)
A8(A)
Rtt
A2
A3
AT
Vtt
=
A. It is very likely that the longest CK/ADDR_CTRL Manhattan distance will be for Address Input 8 (A8) on the DDR3
memories. CACLM is based on the longest Manhattan distance due to the device placement. Verify the net class that
satisfies this criteria and use as the baseline for CK/ADDR_CTRL skew matching and length control.
The length of shorter CK/ADDR_CTRL stubs as well as the length of the terminator stub are not included in this
length calculation. Non-included lengths are grayed out in the figure.
Assuming A8 is the longest, CALM = CACLMY + CACLMX + 300 mils.
The extra 300 mils allows for routing down lower than the DDR3 memories and returning up to reach A8.
Figure 8-81. CACLM for Two Address Loads on One Side of PCB
Table 8-70. CK and ADDR_CTRL Routing Specification(1)(2)
NO.
1
PARAMETER
MIN
TYP
MAX
2500
25
UNIT
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
mils
A1+A2 length
A1+A2 skew
A3 length
A3 skew(3)
A3 skew(4)
A4 length
A4 skew
2
3
660
25
4
5
125
660
25
6
7
8
AS length
AS skew
100
100
70
9
10 AS+/AS- length
11 AS+/AS- skew
12 AT length(5)
13 AT skew(6)
14 AT skew(7)
15 CK/ADDR_CTRL nominal trace length(8)
5
500
100
5
CACLM-50
CACLM
CACLM+50
(1) The use of vias should be minimized.
(2) Additional bypass capacitors are required when using the DVDD_DDR[0] plane as the reference plane to allow the return current to
jump between the DVDD_DDR[0] plane and the ground plane when the net class switches layers at a via.
(3) Non-mirrored configuration (all DDR3 memories on same side of PCB).
(4) Mirrored configuration (one DDR3 device on top of the board and one DDR3 device on the bottom).
(5) While this length can be increased for convenience, its length should be minimized.
(6) ADDR_CTRL net class only (not CK net class). Minimizing this skew is recommended, but not required.
(7) CK net class only.
(8) CACLM is the longest Manhattan distance of the CK and ADDR_CTRL net classes + 300 mils. For definition, see Section 8.13.3.16.1,
Figure 8-80, and Figure 8-81.
248
Peripheral Information and Timings
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