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DM385 参数 Datasheet PDF下载

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型号: DM385
PDF下载: 下载PDF文件 查看货源
内容描述: DM385和DM388 DaVincia ? ¢数字媒体处理器 [DM385 and DM388 DaVinci™ Digital Media Processor]
分类和应用:
文件页数/大小: 280 页 / 2479 K
品牌: TI [ TEXAS INSTRUMENTS ]
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DM385, DM388  
www.ti.com  
SPRS821D MARCH 2013REVISED DECEMBER 2013  
8.14 Multichannel Audio Serial Port (McASP)  
The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for  
the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM)  
stream, Inter-Integrated Sound (I2S) protocols, and inter-component digital audio interface transmission  
(DIT).  
8.14.1 McASP Device-Specific Information  
The device includes two multichannel audio serial port (McASP) interface peripherals (McASP0 and  
McASP1). The McASP module consists of a transmit and receive section. These sections can operate  
completely independently with different data formats, separate master clocks, bit clocks, and frame syncs  
or, alternatively, the transmit and receive sections may be synchronized. The McASP module also  
includes shift registers that may be configured to operate as either transmit data or receive data.  
The transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM)  
synchronous serial format or in a digital audio interface (DIT) format where the bit stream is encoded for  
S/PDIF, AES-3, IEC-60958, CP-430 transmission. The receive section of the McASP peripheral supports  
the TDM synchronous serial format.  
The McASP module can support one transmit data format (either a TDM format or DIT format) and one  
receive format at a time. All transmit shift registers use the same format and all receive shift registers use  
the same format; however, the transmit and receive formats need not be the same. Both the transmit and  
receive sections of the McASP also support burst mode, which is useful for non-audio data (for example,  
passing control information between two devices).  
The McASP peripheral has additional capability for flexible clock generation and error detection/handling,  
as well as error management.  
The device McASP0 module has up to 6 serial data pins, while McASP1 has 2 serial data pins. The  
McASP FIFO size is 256 bytes and two DMA and two interrupt requests are supported. Buffers are used  
transparently to better manage DMA, which can be leveraged to manage data flow more efficiently.  
For more detailed information on and the functionality of the McASP peripheral, see the Multichannel  
Audio Serial Port (McASP) chapter in the device-specific Technical Reference Manual.  
8.14.2 McASP0 and McASP1 Peripheral Registers Descriptions  
The McASP0 and McASP1 peripheral registers are described in the device-specific Technical Reference  
Manual. Each register is documented as an offset from a base address for the peripheral. The base  
addresses for all of the peripherals are in the device memory map (see Section 2.10).  
Copyright © 2013, Texas Instruments Incorporated  
Peripheral Information and Timings  
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