DM385, DM388
www.ti.com
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
Table 2-5. L4 Slow Peripheral Memory Map (continued)
Cortex-A8 and L3 Masters
SIZE
DEVICE NAME
START ADDRESS
END ADDRESS
(HEX)
(HEX)
0x4804_8000
0x4804_9000
0x4804_A000
0x4804_B000
0x4804_C000
0x4804_D000
0x4804_E000
0x4805_0000
0x4805_2000
0x4805_3000
0x4806_0000
0x4807_0000
0x4807_1000
0x4808_0000
0x4809_0000
0x4809_1000
0x480A_0000
0x480B_0000
0x480B_1000
0x480C_0000
0x480C_1000
0x480C_2000
0x480C_4000
0x480C_8000
0x480C_9000
0x480C_A000
0x480C_B000
0x480C_C000
0x4810_0000
0x4812_0000
0x4812_1000
0x4812_2000
0x4812_3000
0x4812_4000
0x4814_0000
0x4816_0000
0x4816_1000
0x4818_0000
0x4818_3000
0x4818_4000
0x4818_8000
0x4818_9000
0x4818_A000
0x4818_B000
0x4818_C000
0x4818_D000
0x4804_8FFF
0x4804_9FFF
0x4804_AFFF
0x4804_BFFF
0x4804_CFFF
0x4804_DFFF
0x4804_FFFF
0x4805_1FFF
0x4805_2FFF
0x4805_FFFF
0x4806_FFFF
0x4807_0FFF
0x4807_FFFF
0x4808_FFFF
0x4809_0FFF
0x4809_FFFF
0x480A_FFFF
0x480B_0FFF
0x480B_FFFF
0x480C_0FFF
0x480C_1FFF
0x480C_3FFF
0x480C_7FFF
0x480C_8FFF
0x480C_9FFF
0x480C_AFFF
0x480C_BFFF
0x480F_FFFF
0x4811_FFFF
0x4812_0FFF
0x4812_1FFF
0x4812_2FFF
0x4812_3FFF
0x4813_FFFF
0x4815_FFFF
0x4816_0FFF
0x4817_FFFF
0x4818_2FFF
0x4818_3FFF
0x4818_7FFF
0x4818_8FFF
0x4818_9FFF
0x4818_AFFF
0x4818_BFFF
0x4818_CFFF
0x4818_DFFF
4KB
4KB
TIMER6 Peripheral Registers
TIMER6 Interconnect Registers
TIMER7 Peripheral Registers
TIMER7 Interconnect Registers
GPIO1 Peripheral Registers
GPIO1 Interconnect Registers
Reserved
4KB
4KB
4KB
4KB
8KB
8KB
Reserved
4KB
Reserved
52KB
64KB
4KB
Reserved
MMC/SD/SDIO0 Peripheral Registers
MMC/SD/SDIO0 Interconnect Registers
Reserved
60KB
64KB
4KB
ELM Peripheral Registers
ELM Interconnect Registers
Reserved
60KB
64KB
4KB
Reserved
Reserved
60KB
4KB
Reserved
RTC Peripheral Registers
RTC Interconnect Registers
Reserved
4KB
8KB
16KB
4KB
Reserved
Mailbox Peripheral Registers
Mailbox Interconnect Registers
Spinlock Peripheral Registers
Spinlock Interconnect Registers
Reserved
4KB
4KB
4KB
208KB
128KB
4KB
HDVPSS Peripheral Registers
HDVPSS Interconnect Registers
Reserved
4KB
4KB
HDMI Peripheral Registers
HDMI Interconnect Registers
Reserved
4KB
112KB
128KB
4KB
Control Module Peripheral Registers
Control Module Interconnect Registers
Reserved
124KB
12KB
4KB
PRCM Peripheral Registers
PRCM Interconnect Registers
Reserved
16KB
4KB
SmartReflex0 Peripheral Registers
SmartReflex0 Interconnect Registers
SmartReflex1 Peripheral Registers
SmartReflex1 Interconnect Registers
OCP Watchpoint Peripheral Registers
OCP Watchpoint Interconnect Registers
4KB
4KB
4KB
4KB
4KB
Copyright © 2013, Texas Instruments Incorporated
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