DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
www.ti.com
Table 2-5. L4 Slow Peripheral Memory Map (continued)
Cortex-A8 and L3 Masters
SIZE
DEVICE NAME
START ADDRESS
END ADDRESS
(HEX)
(HEX)
0x4818_E000
0x4818_F000
0x4819_0000
0x4819_4000
0x4819_C000
0x4819_C000
0x4819_D000
0x4819_E000
0x4819_F000
0x481A_0000
0x481A_1000
0x481A_2000
0x481A_3000
0x481A_4000
0x481A_5000
0x481A_6000
0x481A_7000
0x481A_8000
0x481A_9000
0x481A_A000
0x481A_B000
0x481A_C000
0x481A_D000
0x481A_E000
0x481A_F000
0x481B_0000
0x481C_0000
0x481C_1000
0x481C_2000
0x481C_3000
0x481C_4000
0x481C_5000
0x481C_6000
0x481C_7000
0x481C_8000
0x481C_9000
0x481C_A000
0x481C_C000
0x481C_E000
0x481D_0000
0x481D_2000
0x481D_4000
0x481D_6000
0x481D_7000
0x481D_8000
0x481E_8000
0x4818_EFFF
0x4818_FFFF
0x4819_3FFF
0x4819_BFFF
0x481F_FFFF
0x4819_CFFF
0x4819_DFFF
0x4819_EFFF
0x4819_FFFF
0x481A_0FFF
0x481A_1FFF
0x481A_2FFF
0x481A_3FFF
0x481A_4FFF
0x481A_5FFF
0x481A_6FFF
0x481A_7FFF
0x481A_8FFF
0x481A_9FFF
0x481A_AFFF
0x481A_BFFF
0x481A_CFFF
0x481A_DFFF
0x481A_EFFF
0x481A_FFFF
0x481B_FFFF
0x481C_0FFF
0x481C_1FFF
0x481C_2FFF
0x481C_3FFF
0x481C_4FFF
0x481C_5FFF
0x481C_6FFF
0x481C_7FFF
0x481C_8FFF
0x481C_9FFF
0x481C_BFFF
0x481C_DFFF
0x481C_FFFF
0x481D_1FFF
0x481D_3FFF
0x481D_5FFF
0x481D_6FFF
0x481D_7FFF
0x481E_7FFF
0x481E_8FFF
4KB
4KB
16KB
32KB
400KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
64KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
4KB
8KB
8KB
8KB
8KB
8KB
8KB
8KB
4KB
4KB
64KB
4KB
Reserved
Reserved
Reserved
Reserved
Reserved
I2C2 Peripheral Registers
I2C2 Interconnect Registers
I2C3 Peripheral Registers
I2C3 Interconnect Registers
SPI1 Peripheral Registers
SPI1 Interconnect Registers
SPI2 Peripheral Registers
SPI2 Interconnect Registers
SPI3 Peripheral Registers
SPI3 Interconnect Registers
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPIO2 Peripheral Registers
GPIO2 Interconnect Registers
GPIO3 Peripheral Registers
GPIO3 Interconnect Registers
Reserved
Reserved
TIMER8 Peripheral Registers
TIMER8 Interconnect Registers
SYNCTIMER32K Peripheral Registers
SYNCTIMER32K Interconnect Registers
PLLSS Peripheral Registers
PLLSS Interconnect Registers
WDT0 Peripheral Registers
WDT0 Interconnect Registers
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
MMC/SD/SDIO1 Peripheral Registers
MMC/SD/SDIO1 Interconnect Registers
20
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