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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
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9
11
I2C[x]_SDA
6
8
14
4
13
5
10
I2C[x]_SCL
1
12
3
7
2
3
Stop
Start
Repeated
Start
Stop
Figure 5-68. I2C Receive Timing
Table 5-70. Switching Characteristics for I2C Output Timings
(see Figure 5-69)
STANDARD MODE
PARAMETER
FAST MODE
NO.
UNIT
MIN
MAX
MIN
MAX
15 tc(SCL)
Cycle time, SCL
10
2.5
us
us
Setup Time, SCL high before SDA low (for a repeated
START condition)
16 tsu(SCLH-SDAL)
4.7
4
0.6
0.6
Hold time, SCL low after SDA low (for a START and a
repeated START condition)
17 th(SDAL-SCLL)
us
18 tw(SCLL)
Pulse duration, SCL low
4.7
4
1.3
0.6
100
0
us
us
ns
19 tw(SCLH)
Pulse duration, SCL high
20 tsu(SDAV-SCLH)
21 th(SCLL-SDAV)
Setup time, SDA valid before SCL high
Hold time, SDA valid after SCL low
250
0
3.45
0.9 us
Pulse duration, SDA high between STOP and START
conditions
22 tw(SDAH)
4.7
1.3
us
23 tr(SDA)
Rise time, SDA
1000
1000
300
300 ns
300 ns
300 ns
300 ns
us
24 tr(SCL)
Rise time, SCL
25 tf(SDA)
Fall time, SDA
26 tf(SCL)
Fall time, SCL
300
27 tsu(SCLH-SDAH)
Setup time, high before SDA high (for STOP condition)
4
0.6
26
24
I2C[x]_SDA
I2C[x]_SCL
21
23
19
28
20
25
27
16
18
22
17
18
Stop
Start
Repeated
Start
Stop
Figure 5-69. I2C Transmit Timing
190
Peripheral Information and Timings
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