欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADS8284IBRGCT 参数 Datasheet PDF下载

ADS8284IBRGCT图片预览
型号: ADS8284IBRGCT
PDF下载: 下载PDF文件 查看货源
内容描述: 18位, 1 MSPS ,具有片上ADC驱动器( OPA )和4通道差分多路复用伪差分双极性SAR ADC [18-BIT, 1-MSPS, PSEUDO-BIPOLAR DIFFERENTIAL SAR ADC WITH ON-CHIP ADC DRIVER (OPA) AND 4-CHANNEL DIFFERENTIAL MULTIPLEXER]
分类和应用: 驱动器转换器模数转换器
文件页数/大小: 38 页 / 1827 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号ADS8284IBRGCT的Datasheet PDF文件第7页浏览型号ADS8284IBRGCT的Datasheet PDF文件第8页浏览型号ADS8284IBRGCT的Datasheet PDF文件第9页浏览型号ADS8284IBRGCT的Datasheet PDF文件第10页浏览型号ADS8284IBRGCT的Datasheet PDF文件第12页浏览型号ADS8284IBRGCT的Datasheet PDF文件第13页浏览型号ADS8284IBRGCT的Datasheet PDF文件第14页浏览型号ADS8284IBRGCT的Datasheet PDF文件第15页  
ADS8284  
www.ti.com................................................................................................................................................................................................... SLAS628MARCH 2009  
PIN FUNCTIONS (continued)  
PIN  
I/O  
DESCRIPTION  
NO  
NAME  
51  
BGND  
Digital ground for ADC bus interface digital supply.  
No connection.  
NOT CONNECTED PINS  
16, 28 NC  
DEVICE OPERATION AND TIMING DIAGRAMS  
The ADS8284 is analog system-on-chip (SoC) device. The device includes a multiplexer, a differential  
input/differential output ADC driver and differential input high-performance ADC, an additional internal reference,  
a buffered reference output, and a REF/2 output.  
Figure 1 shows the basic operation of the device (including all elements). Subsequent sections describe the  
detailed timings of the individual blocks of the device (primarily the multiplexer and ADC).  
m-1  
m
m+1  
m+2  
CONVST  
BUSY  
SELECTED  
CHANNEL  
Ch (n-1)  
Ch (n)  
Ch (n+1)  
Ch(n+2)  
Ch(n+3)  
INP  
Vref V  
ADC differential  
input assuming  
alternate channels  
have+Vref& -Vref  
differential input  
0 V  
INM  
SAMPLE,  
S(m-1)  
-Vref  
S(m)  
+Vref  
S(m+1)  
-Vref  
S(m+2)  
+Vref  
(Vinp- Vinm)  
DB17 - DB0  
Ch (n-2)  
Ch (n-1)  
Ch(n)  
Ch (n+1)  
Parallel o/ p bus  
Figure 1. Device Operation  
As shown in the diagram, the device can be controlled with only one (CONVST) digital input. On the falling edge  
of CONVST, the BUSY output of the device goes high. A high level on BUSY indicates the device has sampled  
the signal and it is converting the sample into its digital equivalent. After the conversion is complete, the BUSY  
output falls to a logic low level and the device output data corresponding to the recently converted sample is  
available for reading.  
Copyright © 2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
11  
Product Folder Link(s) :ADS8284