ADS8284
www.ti.com................................................................................................................................................................................................... SLAS628–MARCH 2009
PIN FUNCTIONS (continued)
PIN
I/O
DESCRIPTION
NO
NAME
51
BGND
Digital ground for ADC bus interface digital supply.
No connection.
NOT CONNECTED PINS
16, 28 NC
DEVICE OPERATION AND TIMING DIAGRAMS
The ADS8284 is analog system-on-chip (SoC) device. The device includes a multiplexer, a differential
input/differential output ADC driver and differential input high-performance ADC, an additional internal reference,
a buffered reference output, and a REF/2 output.
Figure 1 shows the basic operation of the device (including all elements). Subsequent sections describe the
detailed timings of the individual blocks of the device (primarily the multiplexer and ADC).
m-1
m
m+1
m+2
CONVST
BUSY
SELECTED
CHANNEL
Ch (n-1)
Ch (n)
Ch (n+1)
Ch(n+2)
Ch(n+3)
INP
Vref V
ADC differential
input assuming
alternate channels
have+Vref& -Vref
differential input
0 V
INM
SAMPLE,
S(m-1)
-Vref
S(m)
+Vref
S(m+1)
-Vref
S(m+2)
+Vref
(Vinp- Vinm)
DB17 - DB0
Ch (n-2)
Ch (n-1)
Ch(n)
Ch (n+1)
Parallel o/ p bus
Figure 1. Device Operation
As shown in the diagram, the device can be controlled with only one (CONVST) digital input. On the falling edge
of CONVST, the BUSY output of the device goes high. A high level on BUSY indicates the device has sampled
the signal and it is converting the sample into its digital equivalent. After the conversion is complete, the BUSY
output falls to a logic low level and the device output data corresponding to the recently converted sample is
available for reading.
Copyright © 2009, Texas Instruments Incorporated
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