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ADS131B04-Q1 参数 Datasheet PDF下载

ADS131B04-Q1图片预览
型号: ADS131B04-Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [汽车类 24 位 32kSPS 4 通道同步采样 Δ-Σ ADC]
分类和应用:
文件页数/大小: 77 页 / 2316 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS131B04-Q1  
ZHCSMK3B NOVEMBER 2020 REVISED NOVEMBER 2021  
www.ti.com.cn  
8.3.10 Register Map CRC  
The ADS131B04-Q1 performs a CRC on its own register map as a means to check for unintended changes to  
the registers. Enable the register map CRC by setting the REG_CRC_EN bit in the MODE register. When  
enabled, the device constantly calculates the register map CRC across the registers ranging from address 02h  
to 1Ch including the reserved registers. The CRC is calculated beginning with the MSB of register 02h and  
ending with the LSB of register 1Ch using the polynomial selected in the CRC_TYPE bit in the MODE register.  
Two types of CRC polynomials are available: CCITT CRC and ANSI CRC (CRC-16). See 8-8 for details on  
the CRC polynomials. The CRC calculation is initialized with the seed value of FFFFh.  
The calculated CRC is a 16-bit value and is stored in the REGMAP_CRC register. The calculation is done using  
one register map bit per MCLK period and constantly checks the result against the previous calculation. The  
REG_MAP bit in the STATUS register is set to flag the host if the register map CRC changes, including changes  
resulting from register writes. The REG_MAP bit is cleared by reading the STATUS register, or when the  
STATUS register is output as a response to the NULL command.  
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