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ADS131B04-Q1 参数 Datasheet PDF下载

ADS131B04-Q1图片预览
型号: ADS131B04-Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [汽车类 24 位 32kSPS 4 通道同步采样 Δ-Σ ADC]
分类和应用:
文件页数/大小: 77 页 / 2316 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS131B04-Q1  
ZHCSMK3B NOVEMBER 2020 REVISED NOVEMBER 2021  
www.ti.com.cn  
samples available from the ADS131B04-Q1 after a supply ramp or reset have the noise performance and  
frequency response corresponding to the fast-settling filter as specified in the Electrical Characteristics table,  
whereas subsequent samples have the noise performance and frequency response consistent with the sinc3  
filter. See the Fast Start-Up Behavior section for more details regarding the fast start-up capabilities of the  
ADS131B04-Q1.  
8.3.8.1.2 SINC3 and SINC3 + SINC1 Filter  
The ADS131B04-Q1 selects the sinc3 filter path two conversions after power-up or device reset. For OSR  
settings of 128 to 1024, the sinc3 filter output directly feeds into the global-chop and calibration logic. For OSR  
settings of 2048 and higher, the sinc3 filter is followed by a sinc1 filter. As shown in 8-5, the sinc3 filter  
operates at a fixed OSR of 1024 in this case while the sinc1 filter implements the additional OSRs of 2 to 16.  
That means, when an OSR of 4096 (for example) is selected, the sinc3 filter operates at an OSR of 1024 and the  
sinc1 filter at an OSR of 4.  
The filter has infinite attenuation at integer multiples of the data rate except for integer multiples of fMOD. Like all  
digital filters, the digital filter response of the ADS131B04-Q1 repeats at integer multiples of the modulator  
frequency, fMOD. The data rate and filter notch frequencies scale with fMOD  
.
When possible, plan frequencies for unrelated periodic processes in the application for integer multiples of the  
data rate such that any parasitic effect they have on data acquisition is effectively canceled by the notches of the  
digital filter. Avoid frequencies near integer multiples of fMOD whenever possible because tones in these bands  
can alias to the band of interest.  
The sinc3 and sinc3 + sinc1 filters for a given channel require time to settle after a channel is enabled, the  
channel multiplexer or gain setting is changed, or a resynchronization event occurs. 8-5 lists the settling times  
of the sinc3 and sinc3 + sinc1 filters for each OSR setting. The ADS131B04-Q1 does not gate unsettled data.  
Therefore, the host must account for the filter settling time and disregard unsettled data if any are read. The data  
at the next DRDY falling edge after the filter settling time listed in 8-5 has expired can be considered fully  
settled.  
8-5. Digital Filter Settling Times  
OSR (Overall)  
128  
OSR (SINC3)  
OSR (SINC1)  
SETTLING TIME (tMOD)  
128  
N/A  
N/A  
N/A  
N/A  
2
432  
816  
256  
256  
512  
512  
1584  
3120  
6192  
10288  
18480  
34864  
1024  
1024  
2048  
1024  
4096  
1024  
4
8192  
1024  
8
16384  
1024  
16  
8.3.8.2 Digital Filter Characteristic  
方程式 4 calculates the z-domain transfer function of a sinc3 filter that is used for OSRs ranging from 128 to  
1024:  
3
1 - Z -N  
H z  
( )  
=
N 1 - Z -1  
(
)
(4)  
where:  
N is the OSR  
Copyright © 2022 Texas Instruments Incorporated  
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Product Folder Links: ADS131B04-Q1  
 
 
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