ADS1291
ADS1292
ADS1292R
www.ti.com
SBAS502A –DECEMBER 2011–REVISED MARCH 2012
CONFIG1: Configuration Register 1
Address = 01h
BIT 7
BIT 6
0
BIT 5
0
BIT 4
0
BIT 3
0
BIT 2
DR2
BIT 1
DR1
BIT 0
DR0
SINGLE_SHOT
This register configures each ADC channel sample rate.
Bit 7
SINGLE_SHOT: Single-shot conversion
This bit sets the conversion mode
0 = Continuous conversion mode (default)
1 = Single-shot mode
Bits[6:3]
Bits[2:0]
Must be set to '0'
DR[2:0]: Channel oversampling ratio
These bits determine the oversampling ratio of both channel 1 and channel 2.
BIT
000
001
010
011
100
101
110
111
OVERSAMPLING RATIO
fMOD/1024
fMOD/512
DATA RATE(1)
125 SPS
250 SPS
fMOD/256
500 SPS (default)
1 kSPS
fMOD/128
fMOD/64
2 kSPS
fMOD/32
4 kSPS
fMOD/16
8 kSPS
Do not use
Do not use
(1) fCLK = 512 kHz and CLK_DIV = 0 or fCLK = 2.048 MHz and CLK_DIV = 1.
Copyright © 2011–2012, Texas Instruments Incorporated
Submit Documentation Feedback
39
Product Folder Link(s): ADS1291 ADS1292 ADS1292R
TI [ TEXAS INSTRUMENTS ]
