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ADS1292 参数 Datasheet PDF下载

ADS1292图片预览
型号: ADS1292
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,双通道, 24位模拟前端的生物电位测量 [Low-Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements]
分类和应用:
文件页数/大小: 69 页 / 1524 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS1291  
ADS1292  
ADS1292R  
www.ti.com  
SBAS502A DECEMBER 2011REVISED MARCH 2012  
START: Start Conversions  
This opcode starts data conversions. Tie the START pin low to control conversions by command. If conversions  
are in progress this command has no effect. The STOP opcode command is used to stop conversions. If the  
START command is immediately followed by a STOP command then have a gap of 4 tCLK cycles between them.  
When the START opcode is sent to the device, keep the START pin low until the STOP command is issued.  
(See the START subsection of the SPI Interface section for more details.) There are no restrictions on the  
SCLK rate for this command and it can be issued any time.  
STOP: Stop Conversions  
This opcode stops conversions. Tie the START pin low to control conversions by command. When the STOP  
command is sent, the conversion in progress completes and further conversions are stopped. If conversions are  
already stopped, this command has no effect. There are no restrictions on the SCLK rate for this command and it  
can be issued any time.  
OFFSETCAL: Channel Offset Calibration  
This command is used to cancel the channel offset. The CALIB_ON bit in the RESP2 register must be set to '1'  
before issuing this command. OFFSETCAL must be executed every time there is a change in the PGA gain  
settings.  
RDATAC: Read Data Continuous  
This opcode enables the output of conversion data on each DRDY without the need to issue subsequent read  
data opcodes. This mode places the conversion data in the output register and may be shifted out directly. The  
read data continuous mode is the device default mode; the device defaults to this mode on power-up.  
RDATAC mode is cancelled by the Stop Read Data Continuous command. If the device is in RDATAC mode, a  
SDATAC command must be issued before any other commands can be sent to the device. There is no  
restriction on the SCLK rate for this command. However, the subsequent data retrieval SCLKs or the SDATAC  
opcode command should wait at least 4 tCLK cycles. RDATAC timing is shown in Figure 43. As Figure 43 shows,  
there is a keep out zone of 4 tCLK cycles around the DRDY pulse where this command cannot be issued in. To  
retrieve data from the device after RDATAC command is issued, make sure either the START pin is high or the  
START command is issued. Figure 43 shows the recommended way to use the RDATAC command. RDATAC is  
ideally-suited for applications such as data loggers or recorders where registers are set once and do not need to  
be re-configured.  
START  
DRDY  
(1)  
tUPDATE  
CS  
SCLK  
RDATAC Opcode  
DIN  
Hi-Z  
Status Register + 2-Channel Data  
DOUT  
Next Data  
(1) tUPDATE = 4 x tCLK. Do not read data during this time.  
Figure 43. RDATAC Usage  
Copyright © 2011–2012, Texas Instruments Incorporated  
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Product Folder Link(s): ADS1291 ADS1292 ADS1292R  
 
 
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