ADS1291
ADS1292
ADS1292R
SBAS502A –DECEMBER 2011–REVISED MARCH 2012
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SDATAC: Stop Read Data Continuous
This opcode cancels the Read Data Continuous mode. There is no restriction on the SCLK rate for this
command, but the following command must wait for 4 tCLK cycles.
RDATA: Read Data
Issue this command after DRDY goes low to read the conversion result (in Stop Read Data Continuous mode).
There is no restriction on the SCLK rate for this command, and there is no wait time needed for the subsequent
commands or data retrieval SCLKs. To retrieve data from the device after RDATA command is issued, make
sure either the START pin is high or the START command is issued. When reading data with the RDATA
command, the read operation can overlap the occurrence of the next DRDY without data corruption. Figure 44
shows the recommended way to use the RDATA command. RDATA is best suited for ECG- and EEG-type
systems where register setting must be read or changed often between conversion cycles.
START
DRDY
CS
SCLK
RDATA Opcode
RDATA Opcode
DIN
Hi-Z
Status Register+ 8-Channel Data (216 Bits)
DOUT
Figure 44. RDATA Usage
Sending Multi-Byte Commands
The ADS1291, ADS1292, and ADS1292R serial interface decodes commands in bytes and requires 4 tCLK cycles
to decode and execute. Therefore, when sending multi-byte commands, a 4 tCLK period must separate the end of
one byte (or opcode) and the next.
Assume CLK is 512 kHz, then tSDECODE (4 tCLK) is 7.8125 µs. When SCLK is 16 MHz, one byte can be
transferred in 500 ns. This byte-transfer time does not meet the tSDECODE specification; therefore, a delay must be
inserted so the end of the second byte arrives 7.3125 µs later. If SCLK is 1 MHz, one byte is transferred in 8 µs.
Because this transfer time exceeds the tSDECODE specification, the processor can send subsequent bytes without
delay. In this later scenario, the serial port can be programmed to move from single-byte transfer per cycle to
multiple bytes.
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