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ADS1292 参数 Datasheet PDF下载

ADS1292图片预览
型号: ADS1292
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,双通道, 24位模拟前端的生物电位测量 [Low-Power, 2-Channel, 24-Bit Analog Front-End for Biopotential Measurements]
分类和应用:
文件页数/大小: 69 页 / 1524 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS1291  
ADS1292  
ADS1292R  
www.ti.com  
SBAS502A DECEMBER 2011REVISED MARCH 2012  
Continuous Mode  
Conversions begin when the START pin is taken high or when the START opcode command is sent. As seen in  
Figure 38, the DRDY output goes high when conversions are started and goes low when data are ready.  
Conversions continue indefinitely until the START pin is taken low or the STOP opcode command is transmitted.  
When the START pin is pulled low or the stop command is issued, the conversion in progress is allowed to  
complete. Figure 39 and Table 12 show the required DRDY timing to the START pin and the START and STOP  
opcode commands when controlling conversions in this mode. To keep the converter running continuously, the  
START pin can be permanently tied high. Note that when switching from pulse mode to continuous mode, the  
START signal is pulsed or a STOP command must be issued, followed by a START command. This conversion  
mode is ideal for applications that require a fixed continuous stream of conversions results.  
START Pin  
or  
or  
START(1)  
Opcode  
STOP(1)  
Opcode  
DIN  
tDR  
tSETTLE  
DRDY  
(1) START and STOP opcode commands take effect on the seventh SCLK falling edge.  
Figure 38. Continuous Conversion Mode  
tSDSU  
DRDY and DOUT  
tDSHD  
START Pin  
or  
STOP(1)  
STOP(1)  
STOP Opcode  
(1) START and STOP commands take effect on the seventh SCLK falling edge at the end of the opcode transmission.  
Figure 39. START to DRDY Timing  
Table 12. Timing Characteristics for Figure 39(1)  
SYMBOL  
DESCRIPTION  
MIN  
UNIT  
START pin low or STOP opcode to DRDY setup time  
to halt further conversions  
tSDSU  
8
tMOD  
START pin low or STOP opcode to complete current  
conversion  
tDSHD  
8
tMOD  
(1) START and STOP commands take effect on the seventh SCLK falling edge at the end of the opcode transmission.  
Copyright © 2011–2012, Texas Instruments Incorporated  
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Product Folder Link(s): ADS1291 ADS1292 ADS1292R  
 
 
 
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