DS_1217F_002
73S1217F Data Sheet
1.7.5 Interrupts
The 80515 core provides 10 interrupt sources with four priority levels. Each source has its own request
flag(s) located in a special function register (TCON, IRCON, and SCON). Each interrupt requested by the
corresponding flag can be individually enabled or disabled by the enable bits in SFRs IEN0, IEN1, and
IEN2. Some of the 10 sources are multiplexed in order to expand the number of interrupt sources.
These will be described in more detail in the respective sections.
External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other
parts of the 73S1217F, for example the USB interface, USR I/O, RTC, smart card interface, analog
comparators, etc. The external interrupt configuration is shown in Figure 9.
.
PDMUXCtl
ClearPWRDNbit
USR0
USR1
t0
USR2
USR
USR
USR
0
1
int0
USR3
USR4
USR5
USR6
USR7
Int
USR
USR
Pads
Int
Int
Ctl
Ctl
Int
Ctl
t1
Ctl
int1
+
Delay
int2
int3
INT2
INT3
INT
Pads
Card_Det
VCC_OK
CRDCtl
WaitTimeout
Card Event
VCC_TMR
RxData
+
+
SCInt
SCIE
int4
TX_Event
Tx_Sent
TX_Error
RX_Error
VccCTL
MPU
CORE
DuringSTOP,IDLE
USB
when PWRDN bitis set
INT5
Ctl
RTC
int5
KeyPad
2
I C
INT6
Ctl
VDD_Fault
int6
Analog
Comp
Serial
Ch0
SerChan 0 int
SerChan 1 int
Serial
Ch1
Figure 9: External Interrupt Configuration
Rev. 1.2
35
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