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71M6531D_10 参数 Datasheet PDF下载

71M6531D_10图片预览
型号: 71M6531D_10
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 120 页 / 1966 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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FDS 6531/6532 005  
Data Sheet 71M6531D/F-71M6532D/F  
Two-Pin EEPROM Interface  
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is  
multiplexed onto the DIO4 (SCK) and DIO5 (SDA) pins and is selected by setting DIO_EEX[1:0] = 01.  
The MPU communicates with the interface through the SFR registers EEDATA and EECTRL. If the MPU  
wishes to write a byte of data to the EEPROM, it places the data in EEDATA and then writes the Transmit  
code to EECTRL. This initiates the transmit operation which is finished when the BUSY bit falls. INT5 is also  
asserted when BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged  
the transmission.  
A byte is read by writing the Receive command to EECTRL and waiting for the BUSY bit to fall. Upon  
completion, the received data is in EEDATA. The serial transmit and receive clock is 78 kHz during each  
transmission and then holds in a high state until the next transmission. The EECTRL bits when the two-pin  
interface is selected are shown in Table 47.  
Table 47: EECTRL Bits for 2-pin Interface  
Status  
Bit  
Read/ Reset  
Write State  
Name  
Polarity Description  
7
6
5
4
ERROR  
BUSY  
R
R
R
R
0
0
1
1
Positive 1 when an illegal command is received.  
Positive 1 when serial data bus is busy.  
RX_ACK  
TX_ACK  
Negative 0 indicates that the EEPROM sent an ACK bit.  
Negative 0 indicates when an ACK bit has been sent to the  
EEPROM.  
3:0  
CMD[3:0]  
W
0000 Positive  
CMD[3:0]  
Operation  
0000  
No-op command. Stops the I2C  
clock (SCK, DIO4). If not issued,  
SCK keeps toggling.  
0010  
Receive a byte from the EEPROM  
and send ACK.  
0011  
0101  
0110  
Transmit a byte to the EEPROM.  
Issue a STOP sequence.  
Receive the last byte from the  
EEPROM and do not send ACK.  
1001  
Issue a START sequence.  
Others  
No operation, set the ERROR bit.  
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. In  
this case, a resistor has to be used in series with SDA to avoid data collisions due to limits in the  
speed at which the SDA pin can be switched from output to input. Controlling DIO4 and DIO5  
directly is discouraged, because it may tie up the MPU to the point where it may become too busy  
to process interrupts.  
Three-Wire (µ-Wire) EEPROM Interface  
A 500 kHz three-wire interface, using SDATA, SCK and a DIO pin for CS is available. The interface is  
selected by setting DIO_EEX[1:0] = 2 (b10). The EECTRL bits when the three-wire interface is selected  
are shown in Table 48. When EECTRL is written, up to 8 bits from EEDATA are either written to the  
EEPROM or read from the EEPROM, depending on the values of the EECTRL bits.  
The µ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.  
v1.3  
© 2005-2010 TERIDIAN Semiconductor Corporation  
47  
 
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