FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Name
Address (hex) Bit Range
Read/Write
SPI0
SPI1
VERSION
CHIP_ID
TRIMSEL
TRIMX
20B0
20B1
20C8
20C9
20FD
20FE
20FF
4, 0
4, 0
7:0
7:0
4:0
0
RW
R
R
R
RW
RW
RW
TRIM
7:0
SERIALREAD
DATA[ADDR]
8 bit CMD
16 bitAddress
DATA[ADDR+1]
Extended Read . . .
PCSZ
PSCK
0
7
8
23
24
31
32
39
(FromHost) PSDI
(From6531) PSDO
x
C7
C6
C5
C0
A15 A14
A1
A0
x
HI Z
D7
D6
D1
D0
D7
D6
D1
D0
SERIALWRITE
DATA[ADDR]
8 bit CMD
16 bitAddress
DATA[ADDR+1]
Extended Write . . .
PCSZ
PSCK
0
7
8
23
24
31
32
39
(FromHost) PSDI
(From6531) PSDO
x
x
C7
C6
C5
C0
A15 A14
A1
A0
D7
D6
D1
D0
D7
D6
D1
D0
HI Z
Figure 16: SPI Slave Port: Typical Read and Write operations
Possible applications for the SPI interface are:
1) An external host reads data from CE locations to obtain metering information. This can be used in
applications where the 71M6531D/F or 71M6532D/F function as smart front-ends with preprocessing
capability. Since the addresses are in 16-bit format, any type of XRAM data can be accessed: CE,
MPU, I/O RAM, but not SFRs or the 80515-internal register bank.
2) A communication link can be established via the SPI interface: By writing into MPU memory locations,
the external host can initiate and control processes in the MPU of the 71M6531D/F or 71M6532D/F.
Writing to a CE or MPU location normally generates an interrupt, a function that can be used to signal
to the MPU that the byte that had just been written by the external host must be read and processed.
Data can also be inserted by the external host without generating an interrupt.
3) An external DSP can access front-end data generated by the ADC. This mode of operation uses the
71M6531D/F or 71M6532D/F as an analog front-end (AFE).
v1.3
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