12-BIT µP-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
TC7109
TC7109A
TC7109/A PIN DESCRIPTION (Cont.)
40-Pin PDIP
Pin Number
Symbol
Description
27
SEND
Input — Used in handshake mode to indicate ability of an external device to
accept data.
Connect to V+ if not used.
28
29
30
31
32
33
34
35
36
37
38
39
40
V–
Analog Negative Supply — Nominally –5V with respect to GND (Pin 1).
Reference Voltage Output — Nominally 2.8V down from V+ (Pin 40).
Buffer Amplifier Output
REF OUT
BUFFER
AUTO-ZERO
INTEGRATOR
COMMON
INPUT LOW
INPUT HIGH
REF IN +
Auto-Zero Node — Inside foil of CAZ
.
Integrator Output — Outside foil of CINT
.
Analog Common — System is auto-zeroed to COMMON.
Differential Input Low Side
Differential Input High Side
Differential Reference Input Positive
Reference Capacitor Positive
REF CAP +
REF CAP –
REF IN –
Reference Capacitor Negative
Differential Reference Input Negative
Positive Supply Voltage — Nominally +5V with respect to GND (Pin 1).
V+
NOTE: All digital levels are positive true.
CD4040B
15
Q11
RESET
11
CLK
10
40
39
38
37
36
35
34
33
32
31
30
29
28
26
24
23
22
+
–
–
+
+
+5V
V
REF IN
1
40
17
39
38
37
36
35
34
1
25
2
GND
–
+5V
V
TRC
GND
2
3
4
REF CAP
REF CAP
REF IN
OSC CONTROL OSC IN
BUFF OSC OUT
STATUS
EXTERNAL
REFERENCE
1µF
+5V
GND
+5V
GND
RRD
EPE
CLS1
CLS2
SBS
PI
+
1MΩ
19
+
IN HI
IN LO
COM
INT
HBEN
INPUT
–
0.01µF
5–12
RBR1–8
6403
CMOS UART
TC7109A
ANALOG
GND
GND
+5V
C
6
13
14
15
16
3–8
INT
PE
CRL
B9–B12,
POL, OR
0.15µF
C
AZ
AZ
FE
0.33µF
8
8
26–33
24
9–16
17
BUFF
OE
SFD
*TBR1–8
TRE
B1–B8
TEST
LBEN
R
20kΩ 0.2V
REF
INT
REF OUT
GND
100kΩ 1V
REF
18
18
–
V
–5V
DRR
DR
20
19
21
RUN/HOLD
OSC SEL
+5V OR OPEN
GND
RR1
TRO
MODE
23
20
SERIAL
INPUT
TBRL
TBRE
MR
CE/LOAD
SEND
22
27
OSC OUT
OSC IN
3.58MHz
CRYSTAL
21
25
GND
SERIAL
OUTPUT
*
NOTE: For lowest power consumption, TBR1–TBR8 inputs
should have 100kΩ pull-up resistors to +5V.
Figure 1. TC7109A UART Interface (Send Any Word to UART to Transmit Latest Result)
3-96
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
