12-BIT µP-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
1
2
3
4
5
6
7
8
TC7109
TC7109A
ZI
INTEGRATOR
SATURATES
AZ
ZERO INTEGRATOR
PHASE FORCES
INTEGRATOR
OUTPUT TO 0V
INTEGRATOR OUTPUT
FOR OVERRANGE INPUT
NO ZERO
CROSSING
ZERO CROSSING
OCCURS
ZERO CROSSING
DETECTED
INTEGRATOR OUTPUT
FOR NORMAL INPUT
AZ
INT
DE
AZ
PHASE I
PHASE II
PHASE III
INTERNAL CLOCK
INTERNAL LATCH
STATUS OUTPUT
2048
COUNTS
MIN
FIXED
2048
COUNTS
4096
COUNTS
MAX
NUMBER OF COUNTS TO ZERO CROSSING
AFTER ZERO CROSSING, ANALOG SECTION
WILL BE IN AUTO-ZERO CONFIGURATION
PROPORTIONAL TO V
IN
Figure 3. Conversion Timing (RUN/HOLD Pin High)
HIGH-ORDER
LOW-ORDER
BYTE OUTPUTS
BYTE OUTPUTS
B
B
B
B
9
B
8
B
7
B
6
B
5
B
4
B
3
B
2
B
1
TEST
17
POL OR
12 11 10
3
4
5
6
7
8
9 10 11 12 13 14 15 16
18
19
20
LBEN
HBEN
14 THREE-STATE OUTPUTS
14 LATCHES
CE/LOAD
12-BIT COUNTER
LATCH
CLOCK
COMP OUT
AZ
INT
DE (±)
ZI
TO
ANALOG
SECTION
CONVERSION
CONTROL
LOGIC
OSCILLATOR
AND CLOCK
CIRCUITRY
HANDSHAKE
LOGIC
2
26
22 23 24 25
21
27
1
STATUS
RUN/ OSC OSC OSC BUFF MODE
HOLD
SEND
GND
IN OUT SEL OSC
OUT
Figure 4. Digital Section
TELCOM SEMICONDUCTOR, INC.
3-99
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
