12-BIT µP-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
1
2
3
4
5
6
7
8
TC7109
TC7109A
TC7109/A PIN DESCRIPTION
40-Pin PDIP
Pin Number
Symbol
Description
1
2
GND
Digital ground, 0V, ground return for all digital logic.
STATUS
Output HIGH during integrate and deintegrate until data is latched. Output LOW
when analog section is in auto-zero or zero-integrator configuration.
3
4
POL
OR
B12
B11
B10
B9
Polarity — High for positive input.
Overrange — High if overranged.
5
Bit 12 (Most Significant Bit)
6
Bit 11
Bit 10
Bit 9
7
8
9
B8
Bit 8
All Three-State Data Bits
Bit 7
10
11
12
13
14
15
16
17
B7
B6
Bit 6
B5
Bit 5
B4
Bit 4
B3
Bit 3
B2
Bit 2
B1
Bit 1 (Least Significant Bit)
TEST
Input High — Normal operation. Input LOW — Forces all bit outputs HIGH.
Note: This input is used for test purposes only.
18
19
20
21
Low-Byte Enable — With MODE (Pin 21) LOW, and CE/LOAD (Pin 20) LOW,
taking this pin LOW activates low-order byte outputs, B1–B8. With MODE (Pin 21)
HIGH, this pin serves as low-byte flag output used in handshake mode. See
Figures 7, 8, and 9.
LBEN
HBEN
High-Byte Enable — With MODE (Pin 21) LOW, and CE/LOAD (Pin 20) LOW,
taking this pin LOW activates high-order byte outputs, B9–B12, POL, OR. With
MODE (Pin 21) HIGH, this pin serves as high-byte flag output used in handshake
mode. See Figures 7, 8, and 9.
Chip Enable/Load — With MODE (Pin 21) LOW, CE/LOAD serves as a master
output enable. When HIGH, B1–B12, POL, OR outputs are disabled. When
MODE (Pin 21) is HIGH, a load strobe is used in handshake mode. See Figure 7,
8, and 9.
CE/LOAD
MODE
Input LOW — Direct output mode where CE/LOAD (Pin 20), HBEN (Pin 19), and
LBEN (Pin 18) act as inputs directly controlling byte outputs.
Input Pulsed HIGH — Causes immediate entry into handshake mode and output
of data as in Figure 9.
Input HIGH — Enables CE/LOAD (Pin 20), HBEN (Pin 19), and LBEN (Pin 18)
as outputs, handshake mode will be entered and data output as in Figures 7 and
8 at conversions completion.
22
23
24
OSC IN
OSC OUT
OSC SEL
Oscillator Input
Oscillator Output
Oscillator Select — Input HIGH configures OSC IN, OSC OUT, BUF OSC OUT as
RC oscillator — clock will be same phase and duty cycle as BUF OSC OUT. Input
LOW configures OSC IN, OSC OUT for crystal oscillator — clock frequency will
be 1/58 of frequency at BUF OSC OUT.
25
26
BUF OSC OUT
RUN/HOLD
Buffered Oscillator Output
Input HIGH — Conversions continuously performed every 8192 clock pulses.
Input LOW — Conversion in progress completed; converter will stop in auto-zero
seven counts before integrate.
TELCOM SEMICONDUCTOR, INC.
3-95
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
