SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
15. SPI Function - Serial Peripheral Interface
Serial Peripheral Interface (SPI) is a synchronous protocol that allows a master device to initiate communication with
slave devices.
The interrupt vector is 4Bh.
There are 4 signals used in SPI, they are
SPI_MOSI: data output in the master mode, data input in the slave mode,
SPI_MISO: data input in the master mode, data output in the master mode,
SPI_SCK: clock output from the master, the above data are synchronous to this signal
SPI_SS: input in the slave mode.
This slave device detects this signal to judge if it is selected by the master. As shown in Fig. 15-1
In the master mode, it can select the desired slave device by any IO with value = 0. As below figure is an example
showing the relation of the 4 signals between master and slaves.
Slave 2
Master
Slave 1
MOSI
MISO
CLK
MOSI
MISO
CLK
MOSI
MISO
CLK
IO
IO
SS
SS
Fig. 15-1: SPI signals between master and slave devices
There is only one channel SPI interface. The SPI SFRs are shown as below:
Mnemonic
Description
Dir.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RST
The relevant registers of the SPI function
P4UR
Auxiliary
register
AUX
91h
BRGS
-
P4SPI
P4IIC P0KBI
-
DPS
00H
1
SPI function
SPI control
register 1
SPI control
register 2
SPI status
register
SPI transmit
data buffer
SPI receive
data buffer
SPIMS
S
SPICK SPICK
SPIC1
SPIC2
SPIS
F1h
F2h
F5h
F3h
F4h
SPIEN
SPIFD
SPIRF
SPISSP
TBC[2:0]
SPIOV
SPIBR[2:0]
RBC[2:0]
08H
00H
P
E
SPIRS
T
SPIML
S
SPITX SPITD SPIRX SPIRD
IF IF
SPIRS 40H
00H
R
R
SPITXD
SPIRXD
SPITXD[7:0]
SPIRXD[7:0]
00H
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
- 103 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
