UPSD3212C, UPSD3212CV
Table 96. External Data Memory AC Characteristics (with the 3V MCU Module)
Variable Oscillator
24MHz Oscillator
1/t
= 8 to 24MHz
(1)
CLCL
Symbol
Unit
Parameter
Min
180
180
56
Max
Min
Max
t
6t
6t
2t
– 70
RD pulse width
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RLRH
WLWH
LLAX2
RHDX
RHDX
RHDZ
LLDV
CLCL
CLCL
CLCL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
– 70
– 27
WR pulse width
Address hold after ALE
RD to valid data in
Data hold after RD
Data float after RD
ALE to valid data in
5t
2t
– 90
118
CLCL
0
0
– 20
– 133
– 155
+ 50
63
CLCL
8t
9t
t
200
220
175
CLCL
CLCL
CLCL
Address to valid data in
ALE to WR or RD
AVDV
LLWL
3t
4t
t
– 50
– 97
– 25
– 37
– 122
– 27
75
67
17
5
CLCL
Address valid to WR or RD
WR or RD High to ALE High
Data valid to WR transition
Data set up before WR
Data hold after WR
AVWL
WHLH
QVWX
QVWH
WHQX
RLAZ
CLCL
t
+ 25
67
CLCL
CLCL
CLCL
CLCL
CLCL
t
7t
t
170
15
Address float after RD
0
0
Note: 1. Conditions (in addition to those in Table 87, V = 3.0 to 3.6V): V = 0V; C for Port 0, ALE and PSEN output is 100pF, for 5V
CC
SS
L
devices, and 50pF for 3V devices; C for other outputs is 80pF, for 5V devices, and 50pF for 3V devices)
L
Table 97. A/D Analog Specification
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
V
Analog Power Supply Input
Voltage Range
AV
V
V
CC
REF
SS
V
AN
V
SS
– 0.3
AV
+ 0.3
Analog Input Voltage Range
V
REF
Current Following between V
CC
I
200
µA
AVDD
and V
SS
CA
Overall Accuracy
±2
±2
±2
±2
±2
±2
20
l.s.b.
l.s.b.
l.s.b.
l.s.b.
l.s.b.
l.s.b.
µs
IN
N
NLE
Non-Linearity Error
N
Differential Non-Linearity Error
Zero-Offset Error
Full Scale Error
DNLE
N
ZOE
N
FSE
N
Gain Error
GE
T
Conversion Time
at 8MHz clock
CONV
132/152
STMICROELECTRONICS [ ST ]
