Electrical characteristics
STM8S003F3 STM8S003K3
9.3.10
10-bit ADC characteristics
Subject to general operating conditions for V
specified.
, f
, and T unless otherwise
DDA MASTER A
Table 45. ADC characteristics
Conditions
Symbol
Parameter
Min
Typ
Max
Unit
VDDA = 3 to 5.5 V
1
-
4
fADC
ADC clock frequency
MHz
VDDA = 4.5 to 5.5 V
-
1
-
-
6
VAIN
Conversion voltage range(1)
VSS
VDD
V
Internal sample and hold
capacitor
CADC
-
-
3
-
pF
f
ADC = 4 MHz
-
-
-
0.75
0.5
7
-
-
-
(1)
tS
Sampling time
µs
fADC = 6 MHz
tSTAB Wakeup time from standby
-
µs
µs
fADC = 4 MHz
fADC = 6 MHz
-
3.5
2.33
14
Total conversion time (including
tCONV
µs
sampling time, 10-bit resolution)
1/fADC
1. During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged by the external
source. The internal resistance of the analog source must allow the capacitance to reach its final voltage
level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on
the conversion result. Values for the sample clock tS depend on programming.
Table 46. ADC accuracy with R
< 10 kΩ , V = 5 V
DD
AIN
Symbol
Parameter
Conditions
Typ
Max(1)
Unit
fADC = 2 MHz
fADC = 4 MHz
1.6
2.2
2.4
1.1
1.5
1.8
1.5
2.1
2.2
0.7
0.7
0.7
0.6
0.8
0.8
3.5
4
|ET|
Total unadjusted error (2)
f
ADC = 6 MHz
4.5
2.5
3
fADC = 2 MHz
fADC = 4 MHz
|EO|
|EG|
|ED|
|EL|
Offset error (2)
f
ADC = 6 MHz
fADC = 2 MHz
ADC = 4 MHz
3
3
Gain error (2)
f
3
LSB
fADC = 6 MHz
fADC = 2 MHz
4
1.5
1.5
1.5
1.5
2
Differential linearity error (2)
Integral linearity error (2)
fADC = 4 MHz
fADC = 6 MHz
fADC = 2 MHz
f
ADC = 4 MHz
fADC = 6 MHz
2
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