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STM8S003F3P6C 参数 Datasheet PDF下载

STM8S003F3P6C图片预览
型号: STM8S003F3P6C
PDF下载: 下载PDF文件 查看货源
内容描述: [MICROCONTROLLER]
分类和应用: 时钟外围集成电路
文件页数/大小: 103 页 / 1343 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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STM8S003F3 STM8S003K3
Electrical characteristics
9.3.11
EMC characteristics
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electromagnetic susceptibility)
While executing a simple application (toggling 2 LEDs through I/O ports), the product is
stressed by two electromagnetic events until a failure occurs (indicated by the LEDs).
ESD:
Electrostatic discharge (positive and negative) is applied on all pins of the device
until a functional disturbance occurs. This test conforms with the IEC 61000-4-2
standard.
FTB:
A burst of fast transient voltage (positive and negative) is applied to V
DD
and V
SS
through a 100 pF capacitor, until a functional disturbance occurs. This test conforms
with the IEC 61000-4-4 standard.
A device reset allows normal operations to be resumed. The test results are given in the
table below based on the EMS levels and classes defined in application note AN1709.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
Corrupted program counter
Unexpected reset
Critical data corruption (control registers...)
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
recovered by applying a low state on the NRST pin or the oscillator pins for 1 second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring (see application note AN1015).
Table 48. EMS data
Symbol
V
FESD
Parameter
Conditions
Level/class
2B
(1)
V
DD
=
3.3 V, T
A
=
25 °C,
Voltage limits to be applied on any I/O pin to
f
MASTER
=
16 MHz,
induce a functional disturbance
conforming to IEC 61000-4-2
Fast transient voltage burst limits to be
V
DD
=
3.3 V, T
A
=
25 °C,
applied through 100pF on V
DD
and V
SS
pins f
MASTER
=
16 MHz,
to induce a functional disturbance
conforming to IEC 61000-4-4
V
EFTB
4A
(1)
1. Data obtained with HSI clock configuration, after applying HW recommendations described in AN2860 -
EMC guidelines for STM8Smicrocontrollers.
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