10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
REGISTER DESCRIPTION (Cont’d)
CHANNEL 12 DATA HIGH REGISTER (D12HR)
R248 - Read/Write
CHANNEL 14 DATA HIGH REGISTER (D14HR)
R252 - Read/Write
Register Page: 62
Register Page: 62
Reset Value: undefined
Reset Value: undefined
7
0
7
0
D12.9 D12.8 D12.7 D12.6 D12.5 D12.4 D12.3 D12.2
D14.9 D14.8 D14.7 D14.6 D14.5 D14.4 D14.3 D14.2
Bits 7:0 = D12.[9:2]: Channel 12 9:2 bit Data
Bits 7:0 = D14.[9:2]: Channel 14 9:2 bit Data
CHANNEL 12 DATA LOW REGISTER (D12LR)
R249 - Read/Write
CHANNEL 14 DATA LOW REGISTER (D14LR)
R253 - Read/Write
Register Page: 62
Register Page: 62
Reset Value: xx00 0000
Reset Value: xx00 0000
7
0
0
7
0
0
D12.1 D12.0
0
0
0
0
0
D14.1 D14.0
0
0
0
0
0
Bits 7:6 = D12.[1:0]: Channel 12 1:0 bit Data
Bits 7:0 = D14.[1:0]: Channel 14 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL 13 DATA HIGH REGISTER (D13HR)
R250 - Read/Write
CHANNEL 15 DATA HIGH REGISTER (D15HR)
R254 - Read/Write
Register Page: 62
Register Page: 62
Reset Value: undefined
Reset Value: undefined
7
0
7
0
D13.9 D13.8 D13.7 D13.6 D13.5 D13.4 D13.3 D13.2
D15.9 D15.8 D15.7 D15.6 D15.5 D15.4 D15.3 D15.2
Bits 7:0 = D13.[9:2]: Channel 13 9:2 bit Data
Bits 7:0 = D15.[9:2]: Channel 15 9:2 bit Data
CHANNEL 13 DATA LOW REGISTER (D13LR)
R251 - Read/Write
CHANNEL 15 DATA LOW REGISTER (D15LR)
R255- Read/Write
Register Page: 62
Register Page: 62
Reset Value: xx00 0000
Reset Value: xx00 0000
7
0
0
7
0
0
D13.1 D13.0
0
0
0
0
0
D15.1 D15.0
0
0
0
0
0
Bits 7:0 = D13.[1:0]: Channel 13 1:0 bit Data
Bits 7:0 = D15.[1:0]: Channel 15 1:0 bit Data
Bits 5:0 = Reserved, forced by hardware to 0.
Bits 5:0 = Reserved, forced by hardware to 0.
Note: If only 8-bit accuracy is required, each Data
High Register can be used to get the conversion
result, ignoring the corresponding DxLR register
content.
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