10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
REGISTER DESCRIPTION (Cont’d)
COMPARE RESULT REGISTER (CRR)
R243 - Read/Write
CHANNEL A LOWER THRESHOLD HIGH
REGISTER (LTAHR)
Register Page: 63
R244 - Read
Reset Value: 0000 xxxx (0xh)
Register Page: 63
Reset Value: undefined
Two adjacent channels (identified as A and B) can
be selected through CLR1 register programming
(bits CC[3:0]); a level window for the converted an-
alog input can be defined on these channels.
7
0
LTA.9 LTA.8 LTA.7 LTA.6 LTA.5 LTA.4 LTA.3 LTA.2
7
0
Bits 7:0 = LTA.[9:2]: Channel A [9:2] bit Lower
Threshold
CBU CAU CBL CAL
x
x
x
x
Bits 7 = CBU: Compare Register Ch. B Upper
Threshold
Set when converted data on channel B is greater
than the threshold value set in UTBHR/UTBLR
registers.
CHANNEL A LOWER THRESHOLD LOW
REGISTER (LTALR)
R245 - Read/Write
Register Page: 63
Reset Value: xx00 0000
7
0
0
Bits 6 = CAU: Compare Register Ch. A Upper
Threshold
Set when converted data on channel A is greater
than the threshold value set in UTAHR/UTALR
registers.
LTA.1 LTA.0
0
0
0
0
0
Bits 7:6 = LTA.[1:0]: Channel A [1:0] bit Lower
Threshold
Bits 5 = CBL: Compare Register Ch. B Lower
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
Set when converted data on channel B is less than
the threshold value set in LTBHR/LTBLR regis-
ters.
CHANNEL B LOWER THRESHOLD HIGH REG-
ISTER (LTBHR)
R246 - Read/Write
Register Page: 63
Reset Value: undefined
Bits 4 = CAL: Compare Register Ch. A Lower
Threshold
Set when converted data on channel A is less than
the threshold value set in LTAHR/LTALR regis-
ters.
7
0
LTB.7 LTB.7 LTB.5 LTB.4 LTB.3 LTB.2 LTB.1 LTB.0
Bits 3:0 = Don’t care
Bits 7:0 = LTB.[9:2]: Channel B [9:2] bit Lower
Threshold
LOWER THRESHOLD REGISTERS (LTiHR/
LTiLR)
The two pairs of Lower Threshold High/Low regis-
ters are used to store the user programmable low-
er threshold 10-bit values, to be compared with the
current conversion results, thus setting the lower
window limit.
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STMICROELECTRONICS [ ST ]
