J1850 Byte Level Protocol Decoder (JBLPD)
J1850 BYTE LEVEL PROTOCOL DECODER (Cont’d)
MSG+CRC, Message byte then append CRC op-
code.
The ‘Message byte with CRC’ opcode is set when
the user program wants to transmit a single byte
message followed by a CRC byte, or transmit the
final byte of a message string followed by a CRC
byte.
chance to rewrite the TXOP register with the cor-
rect opcode. If a TDUF error occurs, a subsequent
MSG+CRC write to the TXOP register will be used
as the first byte of the next frame.
IFR1, In-Frame Response Type 1 opcode.
The In-frame Response Type 1 (IFR 1) opcode is
written if the user program wants to transmit a
physical address byte (contained in the PADDR
register) in response to a message that is currently
being received.
The user program decides to set up an IFR1 upon
receiving a certain portion of the data byte string of
an incoming message. No write of the TXDATA
register is required. The IFR1 gets its data byte
from the PADDR register.
A single byte message is basically an SOF symbol
followed by a single data byte retrieved from TX-
DATA register followed by the computed CRC
byte followed by an EOD symbol. If the J1850 bus
is in idle condition when the opcode is written, an
SOF symbol is immediately transmitted out the
VPWO pin. It then transmits the byte contained in
the TXDATA register, then the computed CRC
byte is transmitted. VPWO is then set to a passive
state. If the J1850 bus is not idle and the J1850
transmitter has not been locked out by loss of arbi-
tration, then the TXDATA byte is transferred to the
serial output shift register for transmission immedi-
ately on completion of any previously transmitted
data. After completion of the TXDATA byte the
computed CRC byte is transferred out the VPWO
pin and then the VPWO pin is set passive to time
an EOD symbol.
The JBLPD block will enable the transmission of
the IFR1 on these conditions:
– 1) The CRC check is valid (otherwise the CRCE
is set)
– 2) The received message length is valid if ena-
bled (otherwise the TRA is set)
– 3) A valid EOD minimum symbol is received (oth-
erwise the IFD may eventually get set due to
byte synchronization errors)
Special Conditions for MSG+CRC Transmit:
– 4) If NFL = 0 & Received Byte Count for this
frame <=11 (otherwise TRA is set)
– 1) A MSG+CRC opcode cannot be queued on
top of an executing IFR3 opcode. If so, then
TRA is set, and TDUF will get set because the
transmit state machine will be expecting more
data, then the inverted CRC is appended to this
frame. Also, no message byte will be sent on
the next frame.
– 5) If not presently executing an MSG, IFR3, op-
code (otherwise TRA is set, and TDUF will get
set because the transmit state machine will be
expecting more data, so the inverted CRC will
be appended to this frame)
– 6) If not presently executing an IFR1, IFR2, or
IFR3+CRC opcode otherwise TRA is set (but no
TDUF)
– 2) If NFL=0, a MSG+CRC can only be queued if
Received Byte Count for this frame <=10 other-
wise the TRA will get set, and TDUF will get set
because the state machine will be expecting
more data, so the transmit machine will send
the inverted CRC after the byte which is pres-
ently transmitting. Also, no message byte will be
sent on the next frame.
– 7) If not presently receiving an IFR portion of a
frame, otherwise TRA is set.
The IFR1 byte is then attempted according to the
procedure described in section “Transmitting a
type 1 IFR”. Note that if an IFR1 opcode is written,
a queued MSG or MSG+CRC is overridden by the
IFR1.
Caution should be taken when TRA gets set in
these cases because the TDUF error sequence
may engage before the user program has a
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STMICROELECTRONICS [ ST ]
