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ST10F276S-4T3 参数 Datasheet PDF下载

ST10F276S-4T3图片预览
型号: ST10F276S-4T3
PDF下载: 下载PDF文件 查看货源
内容描述: 16位MCU与MAC单元832 KB的闪存和68 KB的RAM [16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM]
分类和应用: 闪存
文件页数/大小: 235 页 / 2491 K
品牌: STMICROELECTRONICS [ ST ]
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System reset  
ST10F276E  
Synchronous reset and RPD pin  
Whenever the RSTIN pin is pulled low (by external hardware or as a consequence of a  
Bidirectional reset), the RPD internal weak pull-down is activated. The external capacitance  
(if any) on RPD pin is slowly discharged through the internal weak pull-down. If the voltage  
level on RPD pin reaches the input low threshold (around 2.5V), the reset event becomes  
immediately asynchronous. In case of hardware reset (short or long) the situation goes  
immediately to the one illustrated in Figure 26. There is no effect if RPD comes again above  
the input threshold: the asynchronous reset is completed coherently. To grant the normal  
completion of a synchronous reset, the value of the capacitance shall be big enough to  
maintain the voltage on RPD pin sufficient high along the duration of the internal reset  
sequence.  
For a Software or Watchdog reset event, an active synchronous reset is completed  
regardless of the RPD status.  
It is important to highlight that the signal that makes RPD status transparent under reset is  
the internal RSTF (after the noise filter).  
Figure 28. Synchronous short / long hardware RESET (EA = 1)  
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20$  
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1. RSTIN assertion can be released there. Refer also to Section 19.1 for details on minimum pulse duration.  
2. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for  
114/235  
Doc ID 12303 Rev 3  
 
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