System reset
ST10F276E
Figure 30. Synchronous long hardware RESET (EA = 1)
ꢍꢁꢏ
dꢇ 4#, dꢀꢁ 4#,
ꢀꢉꢁꢇꢑꢆ 4#,
234).
t ꢃꢉ NS
dꢃꢉꢉ NS
t ꢃꢉ NS
dꢃꢉꢉ NS
t ꢃꢉ NS
dꢃꢉꢉ NS
ꢀ
ꢁ 4#,
234&
ꢍAFTER FILTERꢏ
ꢈꢌꢌꢇ 4#,
4RANSPARENT
0ꢉ;ꢀꢃꢐꢀꢈ=
.OT TRANSPARENT
.OT Tꢌ
.OT Tꢌ
4RANSPARENT
0ꢉ;ꢀꢁꢐꢁ=
0ꢉ;ꢀꢐꢉ=
.OT Tꢌ
.OT Tꢌ
.OT TRANSPARENT
ꢊ 4#,
)"53ꢅ#3
ꢁ)NTERNALꢉ
d ꢀMS
&,!234
ꢀꢉꢁꢇꢑꢆ 4#,
234
!T THIS TIME 234& IS SAMPLED ,/7
SO IT IS DEFINITELY ,/.' RESET
234/54
20$
ꢍꢀꢏ
6
ꢔ ꢁꢌꢃ 6 ASYNCHRONOUS RESET NOT ENTERED
20$
ꢁꢉꢉ ! DISCHARGE
'!0'2)ꢉꢉꢀꢉꢊ
1. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for
5V operation), the asynchronous reset is then immediately entered. Even if RPD returns above the
threshold, the reset is defnitively taken as asynchronous.
2. Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked
by the internal filter (refer to Section 19.1).
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Doc ID 12303 Rev 3
STMICROELECTRONICS [ ST ]
