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NAND256R4A0AZA6F 参数 Datasheet PDF下载

NAND256R4A0AZA6F图片预览
型号: NAND256R4A0AZA6F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆, 256兆, 512兆, 1千兆( X8 / X16 ), 528字节/字264页, 1.8V / 3V , NAND闪存 [128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 57 页 / 916 K
品牌: STMICROELECTRONICS [ ST ]
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A  
Copy Back Program  
The Copy Back Program operation is used to copy  
the data stored in one page and reprogram it in an-  
other page.  
The Copy Back Program operation does not re-  
quire external memory and so the operation is  
faster and more efficient because the reading and  
loading cycles are not required. The operation is  
particularly useful when a portion of a block is up-  
dated and the rest of the block needs to be copied  
to the newly assigned block.  
If the Copy Back Program operation fails an error  
is signalled in the Status Register. However as the  
standard external ECC cannot be used with the  
Copy Back operation bit error due to charge loss  
cannot be detected. For this reason it is recom-  
mended to limit the number of Copy Back opera-  
tions on the same data and or to improve the  
performance of the ECC.  
2. When the device returns to the ready state  
(Ready/Busy High), the second bus write  
cycle of the command is given with the 4 bus  
cycles to input the target page address. Refer  
to Table 10. for the addresses that must be the  
same for the Source and Target pages.  
3. Then the confirm command is issued to start  
the P/E/R Controller.  
After a Copy Back Program operation, a partial-  
page program is not allowed in the target page un-  
til the block has been erased.  
See Figure 18. for an example of the Copy Back  
operation.  
Table 10. Copy Back Program Addresses  
Same Address for Source and  
Density  
Target Pages  
The Copy Back Program operation requires three  
steps:  
128 Mbit  
256 Mbit  
512 Mbit  
A23  
A24  
A25  
1. The source page must be read using the Read  
A command (one bus write cycle to setup the  
command and then 4 bus write cycles to input  
the source page address). This operation  
copies all 264 Words/ 528 Bytes from the page  
into the Page Buffer.  
(1)  
A24, A25  
A25, A26  
512 Mbit DD  
(1)  
1 Gbit DD  
Note: 1. DD = Dual Die.  
Figure 18. Copy Back Operation  
tBLBH1  
tBLBH2  
(Read Busy time)  
(Program Busy time)  
RB  
Busy  
Source  
Target  
Address Inputs  
I/O  
00h  
8Ah  
10h  
70h  
SR0  
Address Inputs  
Read  
Code  
Copy Back  
Code  
Read Status Register  
ai07590b  
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