A d v a n c e I n f o r m a t i o n
The following four sections describe the commands that may be executed within
the unlock bypass mode.
Unlock Bypass Program Command
The Unlock Bypass Program command is a two-cycle command that consists of
the actual program command (A0h) and the program address/data combination.
This command does not require the two-cycle “unlock” sequence since the Unlock
Bypass command was previously issued. As with the standard program com-
mand, multiple Unlock Bypass Program commands can be issued once the Unlock
Bypass command is issued.
To return back to standard read operations, the Unlock Bypass Reset command
must be issued.
The Unlock Bypass Program Command is ignored if the SecSi sector is enabled.
Unlock Bypass Chip Erase Command
The Unlock Bypass Chip Erase command is a 2-cycle command that consists of
the erase setup command (80h) and the actual chip erase command (10h). This
command does not require the two-cycle “unlock” sequence since the Unlock By-
pass command was previously issued. Unlike the standard erase command, there
is no Unlock Bypass Erase Suspend or Erase Resume commands.
To return back to standard read operations, the Unlock Bypass Reset command
must be issued.
The Unlock Bypass Program Command is ignored if the SecSi sector is enabled.
Unlock Bypass CFI Command
The Unlock Bypass CFI command is available for PROM programmers and target
systems to read the CFI codes while in Unlock Bypass mode. See Common Flash
Memory Interface (CFI) for specific CFI codes.
To return back to standard read operations, the Unlock Bypass Reset command
must be issued.
The Unlock Bypass Program Command is ignored if the SecSi sector is enabled.
Unlock Bypass Reset Command
The Unlock Bypass Reset command places the device in standard read/reset op-
erating mode. Once executed, normal read operations and user command
sequences are available for execution.
The Unlock Bypass Program Command is ignored if the SecSi sector is enabled.
Chip Erase Command
The Chip Erase command is used to erase the entire flash memory contents of
the chip by issuing a single command. Chip erase is a six-bus cycle operation.
There are two “unlock” write cycles, followed by writing the erase “set up” com-
mand. Two more “unlock” write cycles are followed by the chip erase command.
Chip erase does not erase protected sectors.
The chip erase operation initiates the Embedded Erase algorithm, which automat-
ically preprograms and verifies the entire memory to an all zero pattern prior to
electrical erase. The system is not required to provide any controls or timings
during these operations. Note that a hardware reset immediately terminates
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