CXD1968AR
AUTORCV_3
Read/Write
RESET: 0x1C
Default R/W
Offset Address: 0x79
Bit
Name
Description
7:5 Reserved
TBD
000
R/W
This value represents the maximum allowable delay for
achieving a TS lock indication, after a TPS locked
indication has been achieved.
4:0 TS_LOCK_TIMEOUT
11100 R/W
Worst case delay = 204 symbols (8K) + 38 packets
@ 5M baud = 195ms (= 28 using 7ms increments)
AUTORCV_4
Read Only
Description
Offset Address: 0x7A
Bit
7:4 AUTORCV_RESERVED TBD
This signifies the current status of the demodulator as
Name
Default R/W
—
R
reported by the auto-recovery state machine.
BIT 0: When set, reports that the TPS status can now be
read (TPS_STATUS_READY).
BIT 1: When set, reports that the TS status can now be
read (TS_STATUS_READY).
3:0 DEMOD_STATUS
—
R
BIT 2: When set, reports TPS lock achieved. When
cleared, reports TPS lock NOT achieved.
Only valid when bit 0 is set.
BIT 3: When set, reports TS lock achieved. When
cleared, reports TS lock NOT achieved.
Only valid when bit 1 is set.
TPS_RESERVED_1_EVEN
Read Only
Description
Offset Address: 0x7B
Bit
Name
Default R/W
TPS reserved bits S40-S47 representing Cell-ID bits 7:0
respectively, received in TPS frame numbers 2 and 4.
7:0 CELLID[7:0]
—
R
- 80 -
SONY [ SONY CORPORATION ]
